ISP1582BS,557 NXP Semiconductors, ISP1582BS,557 Datasheet - Page 31

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ISP1582BS,557

Manufacturer Part Number
ISP1582BS,557
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1582BS,557

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
56
Lead Free Status / RoHS Status
Compliant
Table 31.
ISP1582_8
Product data sheet
Bit
Symbol
Reset
Bus reset
Access
Control Function register: bit allocation
8.3.2 Control Function register (address: 28h)
7
-
-
-
Table 29.
Table 30.
The Control Function register performs the buffer management on endpoints. It consists of
1 byte, and the bit configuration is given in
validate any enabled data endpoint. Before accessing this register, the Endpoint Index
register must first be written to specify the target endpoint.
Bit
7 to 6
5
4 to 1
0
Buffer name
SETUP
Control OUT
Control IN
Data OUT
Data IN
reserved
6
-
-
-
Symbol
-
EP0SETUP
ENDPIDX[3:0]
DIR
Endpoint Index register: bit description
Addressing of endpoint buffers
5
-
-
-
Rev. 08 — 22 January 2009
Description
reserved
Endpoint 0 Setup: Selects the SETUP buffer of endpoint 0.
0 — Data buffer
1 — SETUP buffer
Must be logic 0 for access to endpoints other than set-up token buffer.
Endpoint Index: Selects the target endpoint for register access of
buffer length, buffer status, control function, data port, endpoint type
and MaxPacketSize.
Direction: Sets the target endpoint as IN or OUT.
0 — Target endpoint refers to OUT (RX) FIFO
1 — Target endpoint refers to IN (TX) FIFO
EP0SETUP
1
0
0
0
0
CLBUF
R/W
4
0
0
VENDP
Table
R/W
3
0
0
ENDPIDX
00h
00h
00h
0Xh
0Xh
31. Register bits can stall, clear or
Hi-Speed USB peripheral controller
DSEN
W
2
0
0
STATUS
© ST-NXP Wireless 2009. All rights reserved.
DIR
0
0
1
0
1
R/W
1
0
0
ISP1582
STALL
R/W
0
0
0
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