ISP1582BS,557 NXP Semiconductors, ISP1582BS,557 Datasheet - Page 42

• Manufacturer Part Number: ISP1582BS,557
• Manufacturer: NXP Semiconductors

Specifications of ISP1582BS,557

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / RoHS Status: Compliant

Table 53.
ISP1582_8
Product data sheet
Bit
Symbol
Reset
Bus reset
Access
DMA Interrupt Reason register: bit allocation
8.4.5 DMA Interrupt Reason register (address: 50h)
TEST3
15
R
-
-
Table 52.
This 2-byte register shows the source(s) of DMA interrupt. Each bit is refreshed after a
DMA command is executed. An interrupt source is cleared by writing logic 1 to the
corresponding bit. On detecting the interrupt, the external microprocessor must read the
DMA Interrupt Reason register and mask it with the corresponding bits in the DMA
Interrupt Enable register to determine the source of the interrupt.
The bit allocation is given in
Bit
7 to 6 ENDIAN[1:0]
5
4
3
2
1
0
14
Symbol
EOT_POL
-
ACK_POL
DREQ_POL
WRITE_POL
READ_POL
-
-
-
reserved
DMA Hardware register: bit description
13
-
-
-
Description
Endian: These bits determine whether the data bus is swapped between
the internal RAM and the DMA bus.
00 — Normal data representation; 16-bit bus: MSByte on DATA[15:8],
LSByte on DATA[7:0]
01 — Swapped data representation; 16-bit bus: MSByte on DATA[7:0],
LSByte on DATA[15:8]
10 — reserved
11 — reserved
Remark: While operating with the 8-bit data bus, bits ENDIAN[1:0] must
always be set to 00b.
EOT Polarity: Selects the polarity of the End-Of-Transfer input.
0 — EOT is active LOW
1 — EOT is active HIGH
reserved; must be set to logic 0.
Acknowledgment Polarity: Selects the DMA acknowledgment polarity.
0 — DACK is active LOW
1 — DACK is active HIGH
DREQ Polarity: Selects the DMA request polarity.
0 — DREQ is active LOW
1 — DREQ is active HIGH
Write Polarity: Selects the DIOW strobe polarity.
0 — DIOW is active LOW
1 — DIOW is active HIGH
Read Polarity: Selects the DIOR strobe polarity.
0 — DIOR is active LOW
1 — DIOR is active HIGH
Rev. 08 — 22 January 2009
Table
GDMA_
STOP
R/W
12
0
0
53.
EXT_EOT
R/W
11
0
0
Hi-Speed USB peripheral controller
INT_EOT
R/W
10
0
0
reserved
© ST-NXP Wireless 2009. All rights reserved.
R/W
9
-
-
ISP1582
XFER_OK
DMA_
R/W
8
0
0
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