ISP1582BS,557 NXP Semiconductors, ISP1582BS,557 Datasheet - Page 56

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ISP1582BS,557

Manufacturer Part Number
ISP1582BS,557
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1582BS,557

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
56
Lead Free Status / RoHS Status
Compliant
Table 82.
V
ISP1582_8
Product data sheet
Symbol
T
t
t
t
t
t
t
t
t
t
t
t
su1
d1
h1
w1
w2
d2
h2
h3
su2
su3
a1
CC(I/O)
Fig 18. GDMA mode timing (bits MODE[1:0] = 00)
cy1
(write) DATA [ 15:0 ]
(1) Programmable polarity: shown as active LOW.
(2) Programmable polarity: shown as active HIGH.
(read) DATA [ 15:0 ]
DIOR or DIOW
= V
DREQ is continuously asserted, until the last transfer is done or the FIFO is full.
Data strobes: DIOR (read) and DIOW (write).
Parameter
read or write cycle time
DREQ set-up time before first DACK on
DREQ on delay after last strobe off
DREQ hold time after last strobe on
DIOR or DIOW pulse width
DIOR/DIOW recovery time
read data valid delay after strobe on
read data hold time after strobe off
write data hold time after strobe off
write data set-up time before strobe off
DACK set-up time before DIOR/DIOW
assertion
DACK deassertion after DIOR/DIOW
deassertion
CC
GDMA mode timing parameters
DREQ
DACK
= 3.3 V; V
12.2 DMA timing
(2)
(1)
(1)
GND
= 0 V; T
t
su1
t
su3
amb
t
d2
= 40 C to +85 C; unless otherwise specified.
t
w1
t
su2
Rev. 08 — 22 January 2009
t
h2
t
w2
Conditions
t
h3
T
cy1
Min
75
10
33.33
0
39
36
-
-
1
10
0
0
Hi-Speed USB peripheral controller
t
h1
Typ
-
-
-
-
-
-
-
-
-
-
-
-
t
a1
© ST-NXP Wireless 2009. All rights reserved.
t
d1
ISP1582
Max
-
-
-
53
600
-
20
5
-
-
-
30
mgt500
55 of 67
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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