ISP1582BS,557 NXP Semiconductors, ISP1582BS,557 Datasheet - Page 6

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ISP1582BS,557

Manufacturer Part Number
ISP1582BS,557
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1582BS,557

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
56
Lead Free Status / RoHS Status
Compliant
ISP1582_8
Product data sheet
Table 2.
Symbol
RESET_N
EOT
DREQ
DACK
DIOR
DIOW
DGND
INT
CS_N
RD_N
WR_N
A0
A1
A2
V
A3
CC(I/O)
[3]
[1]
Pin description
Pin
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Rev. 08 — 22 January 2009
Type
I
I
O
I
I
I
-
O
I
I
I
I
I
I
-
I
…continued
[2]
Description
reset input (500 s); a LOW level produces an asynchronous
reset; connect to V
When the RESET_N pin is LOW, ensure that the WAKEUP pin
does not go from LOW to HIGH; otherwise the device will enter
test mode.
TTL; 5 V tolerant
end-of-transfer input (programmable polarity); when not in use,
connect this pin to V
input pad; TTL; 5 V tolerant
DMA request (programmable polarity) output; when not in use,
connect this pin to ground through a 10 k resistor; see
Table 51
TTL; 4 ns slew-rate control
DMA acknowledge input (programmable polarity); when not in
use, connect this pin to V
Table 51
TTL; 5 V tolerant
DMA read strobe input (programmable polarity); when not in
use, connect this pin to V
Table 51
TTL; 5 V tolerant
DMA write strobe input (programmable polarity); when not in
use, connect this pin to V
Table 51
TTL; 5 V tolerant
digital ground
interrupt output; programmable polarity (active HIGH or LOW)
and signaling (edge or level triggered)
CMOS output; 8 mA drive
chip select input
input pad; TTL; 5 V tolerant
read strobe input
input pad; TTL; 5 V tolerant
write strobe input
input pad; TTL; 5 V tolerant
bit 0 of the address bus
input pad; TTL; 5 V tolerant
bit 1 of the address bus
input pad; TTL; 5 V tolerant
bit 2 of the address bus
input pad; TTL; 5 V tolerant
supply voltage; used to supply voltage to the I/O pads; see
Section 7.15
bit 3 of the address bus
input pad; TTL; 5 V tolerant
and
and
and
and
Table 52
Table 52
Table 52
Table 52
CC
CC(I/O)
for power-on reset (internal POR circuit)
Hi-Speed USB peripheral controller
CC(I/O)
CC(I/O)
CC(I/O)
through a 10 k resistor
through a 10 k resistor; see
through a 10 k resistor; see
through a 10 k resistor; see
© ST-NXP Wireless 2009. All rights reserved.
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