ISP1582BS,557 NXP Semiconductors, ISP1582BS,557 Datasheet - Page 54

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ISP1582BS,557

Manufacturer Part Number
ISP1582BS,557
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1582BS,557

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
56
Lead Free Status / RoHS Status
Compliant
Table 81.
V
ISP1582_8
Product data sheet
Symbol
Reading
t
t
t
t
t
t
t
Writing
t
t
t
t
t
RLRH
AVRL
RHAX
RLDV
RHDZ
RHSH
SLRL
WLWH
AVWL
WHAX
DVWH
WHDZ
Fig 14. Receiver differential data jitter
CC(I/O)
= V
differential
data lines
T
CC
Parameter
RD_N LOW pulse width
address set-up time before RD_N LOW
address hold time after RD_N HIGH
RD_N LOW to data valid delay
RD_N HIGH to data outputs three-state
delay
RD_N HIGH to CS_N HIGH delay
CS_N LOW to RD_N LOW delay
WR_N LOW pulse width
address set-up time before WR_N LOW
address hold time after WR_N HIGH
data set-up time before WR_N HIGH
data hold time after WR_N HIGH
PERIOD
3.3 V
Register access timing parameters: separate address and data buses
0 V
= 3.3 V; V
12.1 Register access timing
is the bit duration corresponding to the USB data rate.
T
PERIOD
GND
Fig 15. Receiver SE0 width tolerance
= 0 V; T
t
JR
amb
N
= 40 C to +85 C; unless otherwise specified.
consecutive
T
transitions
PERIOD
Rev. 08 — 22 January 2009
t
JR1
differential
data lines
N
Conditions
3.3 V
T
transitions
0 V
PERIOD
paired
t
JR2
t
JR1
Min
> t
0
0
-
0
0
2
15
0
0
11
5
RLDV
Hi-Speed USB peripheral controller
t
FST
Typ
-
-
-
-
-
-
-
-
-
-
-
-
V
IH(min)
mgr872
© ST-NXP Wireless 2009. All rights reserved.
Max
-
-
-
26
15
-
-
-
-
-
-
-
t
JR2
ISP1582
mgr871
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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