MT29F4G08ABADAWP:D Micron Technology Inc, MT29F4G08ABADAWP:D Datasheet - Page 30

• Manufacturer Part Number: MT29F4G08ABADAWP:D
• Description: MICMT29F4G08ABADAWP:D 4GB SLC NAND 34NM
• Manufacturer: Micron Technology Inc

Specifications of MT29F4G08ABADAWP:D

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Device Initialization
Figure 24: R/B# Power-On Behavior
PDF: 09005aef83b25735
m60a_4gb_nand.pdf – Rev. G 11/10 EN
V
R/B#
CC
V
CC
V
CC
Micron NAND Flash devices are designed to prevent data corruption during power tran-
sitions. V
protection during power transitions.) When ramping V
to initialize the device:
starts
= V
ramp
1. Ramp V
2. The host must wait for R/B# to be valid and HIGH before issuing RESET (FFh) to
3. If not monitoring R/B#, the host must wait at least 100µs after V
4. The asynchronous interface is active by default for each target. Each LUN draws
5. The RESET (FFh) command must be the first command issued to all targets (CE#s)
6. The device is now initialized and ready for normal operation.
CC
(MIN)
any target. The R/B# signal becomes valid when 50µs has elapsed since the begin-
ning the V
(MIN). If monitoring R/B#, the host must wait until R/B# is HIGH.
less than an average of 10mA (I
(FFh) command is issued.
after the NAND Flash device is powered on. Each target will be busy for 1ms after a
RESET command is issued. The RESET busy time can be monitored by polling R/
B# or issuing the READ STATUS (70h) command to poll the status register.
50µs (MIN)
CC
is internally monitored. (The WP# signal supports additional hardware
(MAX)
CC
10µs
.
CC
ramp, and 10µs has elapsed since V
30
100µs (MAX)
4Gb, 8Gb: x8, x16 NAND Flash Memory
ST
) measured over intervals of 1ms until the RESET
Micron Technology, Inc. reserves the right to change products or specifications without notice.
CC
CC
reaches V
, use the following procedure
Device Initialization
© 2009 Micron Technology, Inc. All rights reserved.
CC
(MIN).
CC
Reset (FFh)
Invalid
is issued
reaches V
CC