MT29F4G08ABADAWP:D Micron Technology Inc, MT29F4G08ABADAWP:D Datasheet - Page 82

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MT29F4G08ABADAWP:D

Manufacturer Part Number
MT29F4G08ABADAWP:D
Description
MICMT29F4G08ABADAWP:D 4GB SLC NAND 34NM
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT29F4G08ABADAWP:D

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Block Lock Feature
WP# and Block Lock
UNLOCK (23h-24h)
PDF: 09005aef83b25735
m60a_4gb_nand.pdf – Rev. G 11/10 EN
The block lock feature protects either the entire device or ranges of blocks from being
programmed and erased. Using the block lock feature is preferable to using WP# to pre-
vent PROGRAM and ERASE operations.
Block lock is enabled and disabled at power-on through the LOCK pin. At power-on, if
LOCK is LOW, all BLOCK LOCK commands are disabled. However if LOCK is HIGH at
power-on, the BLOCK LOCK commands are enabled and, by default, all the blocks on
the device are protected, or locked, from PROGRAM and ERASE operations, even if WP#
is HIGH.
Before the contents of the device can be modified, the device must first be unlocked.
Either a range of blocks or the entire device may be unlocked. PROGRAM and ERASE
operations complete successfully only in the block ranges that have been unlocked.
Blocks, once unlocked, can be locked again to protect them from further PROGRAM
and ERASE operations.
Blocks that are locked can be protected further, or locked tight. When locked tight, the
device’s blocks can no longer be locked or unlocked until the device is power cycled.
The following is true when the block lock feature is enabled:
• Holding WP# LOW locks all blocks, provided the blocks are not locked tight.
• If WP# is held LOW to lock blocks, then returned to HIGH, a new UNLOCK command
By default at power-on, if LOCK is HIGH, all the blocks are locked and protected from
PROGRAM and ERASE operations. The UNLOCK (23h) command is used to unlock a
range of blocks. Unlocked blocks have no protection and can be programmed or erased.
The UNLOCK command uses two registers, a lower boundary block address register
and an upper boundary block address register, and the invert area bit to determine
what range of blocks are unlocked. When the invert area bit = 0, the range of blocks
within the lower and upper boundary address registers are unlocked. When the invert
area bit = 1, the range of blocks outside the boundaries of the lower and upper boun-
dary address registers are unlocked. The lower boundary block address must be less
than the upper boundary block address. The figures below show examples of how the
lower and upper boundary address registers work with the invert area bit.
To unlock a range of blocks, issue the UNLOCK (23h) command followed by the appro-
priate address cycles that indicate the lower boundary block address. Then issue the
24h command followed by the appropriate address cycles that indicate the upper boun-
dary block address. The least significant page address bit, PA0, should be set to 1 if
setting the invert area bit; otherwise, it should be 0. The other page address bits should
be 0.
Only one range of blocks can be specified in the lower and upper boundary block ad-
dress registers. If after unlocking a range of blocks the UNLOCK command is again
issued, the new block address range determines which blocks are unlocked. The previ-
ous unlocked block address range is not retained.
must be issued to unlock blocks.
82
4Gb, 8Gb: x8, x16 NAND Flash Memory
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.
Block Lock Feature

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