MT29F4G08ABADAWP:D Micron Technology Inc, MT29F4G08ABADAWP:D Datasheet - Page 70

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MT29F4G08ABADAWP:D

Manufacturer Part Number
MT29F4G08ABADAWP:D
Description
MICMT29F4G08ABADAWP:D 4GB SLC NAND 34NM
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT29F4G08ABADAWP:D

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Program Operations
PDF: 09005aef83b25735
m60a_4gb_nand.pdf – Rev. G 11/10 EN
Program operations are used to move data from the cache or data registers to the
NAND array. During a program operation the contents of the cache and/or data regis-
ters are modified by the internal control logic.
Within a block, pages must be programmed sequentially from the least significant page
address to the most significant page address (0, 1, 2, ….., 63). During a program opera-
tion, the contents of the cache and/or data registers are modified by the internal
control logic.
Program Operations
The PROGRAM PAGE (80h-10h) command, when not preceded by the PROGRAM PAGE
TWO-PLANE (80h-11h) command, programs one page from the cache register to the
NAND Flash array. When the die (LUN) is ready (RDY = 1, ARDY = 1), the host should
check the FAIL bit to verify that the operation has completed successfully.
Program Cache Operations
The PROGRAM PAGE CACHE (80h-15h) command can be used to improve program op-
eration system performance. When this command is issued, the die (LUN) goes busy
(RDY = 0, ARDY = 0) while the cache register contents are copied to the data register,
and the die (LUN) is busy with a program cache operation (RDY = 1, ARDY = 0. While
the contents of the data register are moved to the NAND Flash array, the cache register
is available for an additional PROGRAM PAGE CACHE (80h-15h) or PROGRAM PAGE
(80h-10h) command.
For PROGRAM PAGE CACHE series (80h-15h) operations, during the die (LUN) busy
times,
status operations (70h, 78h) and reset (FFh). When RDY = 1 and ARDY = 0, the only valid
commands during PROGRAM PAGE CACHE series (80h-15h) operations are status oper-
ations (70h, 78h), PROGRAM PAGE CACHE (80h-15h), PROGRAM PAGE (80h-10h),
RANDOM DATA INPUT (85h), PROGRAM FOR INTERNAL DATA INPUT (85h), and RE-
SET (FFh).
Two-Plane Program Operations
The PROGRAM PAGE TWO-PLANE (80h-11h) command can be used to improve pro-
gram operation system performance by enabling multiple pages to be moved from the
cache registers to different planes of the NAND Flash array. This is done by prepending
one or more PROGRAM PAGE TWO-PLANE (80h-11h) commands in front of the PRO-
GRAM PAGE (80h-10h) command.
Two-Plane Program Cache Operations
The PROGRAM PAGE TWO-PLANE (80h-11h) command can be used to improve pro-
gram cache operation system performance by enabling multiple pages to be moved
from the cache registers to the data registers and, while the pages are being transferred
from the data registers to different planes of the NAND Flash array, free the cache regis-
ters to receive data input from the host. This is done by prepending one or more
PROGRAM PAGE TWO-PLANE (80h-11h) commands in front of the PROGRAM PAGE
CACHE (80h-15h) command.
t
CBSY and
t
LPROG, when RDY = 0 and ARDY = 0, the only valid commands are
70
4Gb, 8Gb: x8, x16 NAND Flash Memory
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Program Operations
© 2009 Micron Technology, Inc. All rights reserved.

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