MT29F4G08ABADAWP:D Micron Technology Inc, MT29F4G08ABADAWP:D Datasheet - Page 59

• Manufacturer Part Number: MT29F4G08ABADAWP:D
• Description: MICMT29F4G08ABADAWP:D 4GB SLC NAND 34NM
• Manufacturer: Micron Technology Inc

Specifications of MT29F4G08ABADAWP:D

• Lead Free Status / Rohs Status: Supplier Unconfirmed

PROGRAM FOR INTERNAL DATA INPUT (85h)
PDF: 09005aef83b25735
m60a_4gb_nand.pdf – Rev. G 11/10 EN
The PROGRAM FOR INTERNAL DATA INPUT (85h) command changes the row address
(block and page) where the cache register contents will be programmed in the NAND
Flash array. It also changes the column address of the selected cache register and ena-
bles data input on the specified die (LUN). This command is accepted by the selected
die (LUN) when it is ready (RDY = 1; ARDY = 1). It is also accepted by the selected die
(LUN) during cache programming operations (RDY = 1; ARDY = 0).
Write 85h to the command register. Then write two column address cycles and three
row address cycles. This updates the page and block destination of the selected device
for the addressed LUN and puts the cache register into data input mode. After the fifth
address cycle is issued the host must wait at least
ted LUN stays in data input mode until another valid command is issued. Though data
input mode is enabled, data input from the host is optional. Data input begins at the
column address specified.
The PROGRAM FOR INTERNAL DATA INPUT (85h) command is allowed after the re-
quired address cycles are specified, but prior to the final command cycle (10h, 11h, 15h)
of the following commands while data input is permitted: PROGRAM PAGE (80h-10h),
PROGRAM PAGE TWO-PLANE (80h-11h), PROGRAM PAGE CACHE (80h-15h), PRO-
GRAM FOR INTERNAL DATA MOVE (85h-10h), and PROGRAM FOR TWO-PLANE IN-
TERNAL DATA MOVE (85h-11h). When used with these commands, the LUN address
and plane select bits are required to be identical to the LUN address and plane select
bits originally specified.
The PROGRAM FOR INTERNAL DATA INPUT (85h) command enables the host to mod-
ify the original page and block address for the data in the cache register to a new page
and block address.
In devices that have more than one die (LUN) per target, the PROGRAM FOR INTER-
NAL DATA INPUT (85h) command can be used with other commands that support
interleaved die (multi-LUN) operations.
The PROGRAM FOR INTERNAL DATA INPUT (85h) command can be used with the RAN-
DOM DATA READ (05h-E0h) or RANDOM DATA READ TWO-PLANE (06h-E0h) com-
mands to read and modify cache register contents in small sections prior to
programming cache register contents to the NAND Flash array. This capability can re-
duce the amount of buffer memory used in the host controller.
The RANDOM DATA INPUT (85h) command can be used during the PROGRAM FOR
INTERNAL DATA MOVE command sequence to modify one or more bytes of the origi-
nal data. First, data is copied into the cache register using the 00h-35h command
sequence, then the RANDOM DATA INPUT (85h) command is written along with the
address of the data to be modified next. New data is input on the external data pins.
This copies the new data into the cache register.
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4Gb, 8Gb: x8, x16 NAND Flash Memory
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Column Address Operations
t
ADL before inputting data. The selec-
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