Z8018233ASG Zilog, Z8018233ASG Datasheet - Page 55

• Manufacturer Part Number: Z8018233ASG
• Description: IC 33MHZ STATIC MIMIC 100-LQFP
• Manufacturer: Zilog

Specifications of Z8018233ASG

• Processor Type: Z180
• Features: Smart Peripheral Controller
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Processor Series: Z8018xx
• Core: Z80
• Data Bus Width: 8 bit
• Program Memory Type: ROMLess
• Interface Type: UART
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS971820600
Zilog
Read Register 0
Read Register 1
Read Register 2
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Figure 52. Write Register Bit Functions (Continued)
Rx Character Available
Zero Count
Tx Buffer Empty
DCD
Sync/Hunt
CTS
Tx Underrun/EOM
Break/Abort
All Sent
Residue Code 2
Residue Code 1
Residue Code 0
Parity Error
Rx Overrun Error
CRC/Framing Error
End of Frame (SDLC)
V0
V1
V2
V3
V4
V5
V6
V7
Interrupt
Vector
PS009801-0301
P R E L I M I N A R Y
Read Register 6*
Read Register 3
Read Register 7*
D7
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
*Can only be accessed if the SDLC FIFO enhancement
SDLC FIFO Status and Byte Count (LSB)
*Can only be accessed if the SDLC FIFO enhancement
SDLC FIFO Status and Byte Count (LSB)
is enabled (WR15 bit D2 set to 1)
is enabled (WR15 bit D2 set to 1)
D6 D5 D4 D3
D2 D1 D0
0
0
0
Ext/Status IP
Tx IP
Rx IP
Z
0
0
BC8
BC9
BC10
BC11
BC12
BC13
FDA: FIFO Data Available
1 = Status Reads from FIFO
0 = Status Reads from EMSCC
FOS: FIFO Overflow Status
1 = FIFO Overflowed
0 = Normal
BC0
BC1
BC2
BC3
BC4
BC5
BC6
BC7
ILOG
I
NTELLIGENT
Z80182/Z8L182
P
ERIPHERAL
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