Z8018233ASG Zilog, Z8018233ASG Datasheet - Page 75

• Manufacturer Part Number: Z8018233ASG
• Description: IC 33MHZ STATIC MIMIC 100-LQFP
• Manufacturer: Zilog

Specifications of Z8018233ASG

• Processor Type: Z180
• Features: Smart Peripheral Controller
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Processor Series: Z8018xx
• Core: Z80
• Data Bus Width: 8 bit
• Program Memory Type: ROMLess
• Interface Type: UART
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Z80182 ENHANCEMENTS REGISTER
Bit <7-6> Reserved
Bit 5 Force Z180 Halt Mode
If this bit is set to 1, it disables the 16 cycle halt recovery
and halt control over the busses and pins. This bit is used
to allow DMA and Refresh Access to take place during halt
(like Z180). This bit is set to 0 on reset.
Bit 4 TxDA Tri-state
The TxDA pin can be tri-stated on assertion of the /HALT
pin. This prevents the TxDA from driving and external
device when /HALT output is used to force other devices
into power-down modes. This feature is disabled on power-
up or reset. It is also controlled by bit 5 in the enhancement
register, this feature is disabled if bit 5 is set.
Bit 3 ESCC Clock Divider
The ESCC clock can be provided with the Z180 core's PHI
clock or by a PHI clock divide by 2 circuit. When this bit is
set, the ESCC's clock will be Z180's PHI clock divided by
DS971820600
Zilog
PS009801-0301
P R E L I M I N A R Y
two. Upon power-up or reset, the ESCC clock frequency is
equal to the Z180 core's PHI clock output.
Note: If operating above 20 MHz/5V or 10 MHz/3V, this bit
should be set for ESCC divide-by-two mode.
Figure 82. Z80182 Enhancements Register
D7 D6 D5 D4 D3 D2 D1 D0
0
(Z180 MPU Read/Write, Address xxD9H)
0
0
0
0
0
0
0
Z
ILOG
Reserved
ESCC Clock Divider
TxDA Tri-state
Force Z180 Halt mode
Reserved
I
NTELLIGENT
Z80182/Z8L182
P
ERIPHERAL
3-75