PIC18F26K80-E/SP Microchip Technology Inc., PIC18F26K80-E/SP Datasheet - Page 134

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PIC18F26K80-E/SP

Manufacturer Part Number
PIC18F26K80-E/SP
Description
28 SPDIP .300IN TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F26K80-E/SP

A/d Inputs
8-Channel, 12-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
24
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
64K Bytes
Ram Size
3.6K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
2-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F26K80-E/SP
Manufacturer:
SILICON
Quantity:
210
PIC18F66K80 FAMILY
6.6.3
The use of Indexed Literal Offset Addressing mode
effectively changes how the lower part of Access RAM
(00h to 5Fh) is mapped. Rather than containing just the
contents of the bottom part of Bank 0, this mode maps
the contents from Bank 0 and a user-defined “window”
that can be located anywhere in the data memory
space.
The value of FSR2 establishes the lower boundary of
the addresses mapped into the window, while the
upper boundary is defined by FSR2 plus 95 (5Fh).
Addresses in the Access RAM above 5Fh are mapped
as previously described. (See
Bank”
addressing mode is shown in
FIGURE 6-10:
DS39977C-page 134
Example Situation:
ADDWF f, d, a
FSR2H:FSR2L = 120h
Locations in the region
from the FSR2 Pointer
(120h) to the pointer plus
05Fh (17Fh) are mapped
to
Access RAM (000h-05Fh).
Special Function Registers
at F60h through FFFh are
mapped to 60h through
FFh, as usual.
Bank 0 addresses below
5Fh are not available in
this mode. They can still
be addressed by using the
BSR.
.) An example of Access Bank remapping in this
the
MAPPING THE ACCESS BANK IN
INDEXED LITERAL OFFSET MODE
bottom
of
REMAPPING THE ACCESS BANK WITH INDEXED LITERAL
OFFSET ADDRESSING
the
Figure
Section 6.3.2 “Access
FFFh
000h
05Fh
100h
120h
17Fh
200h
F00h
F60h
6-10.
Data Memory
Not Accessible
Bank 14
Bank 15
Window
through
Bank 2
Bank 0
Bank 1
SFRs
Preliminary
Remapping the Access Bank applies only to operations
using the Indexed Literal Offset mode. Operations that
use the BSR (Access RAM bit = 1 ) will continue to use
Direct Addressing as before. Any Indirect or Indexed
Addressing operation that explicitly uses any of the
indirect file operands (including FSR2) will continue to
operate as standard Indirect Addressing. Any instruc-
tion that uses the Access Bank, but includes a register
address of greater than 05Fh, will use Direct
Addressing and the normal Access Bank map.
6.6.4
Although the Access Bank is remapped when the
extended instruction set is enabled, the operation of the
BSR remains unchanged. Direct Addressing, using the
BSR to select the data memory bank, operates in the
same manner as previously described.
BSR IN INDEXED LITERAL
OFFSET MODE
 2011 Microchip Technology Inc.
Bank 1 “Window”
Access Bank
SFRs
00h
5Fh
60h
FFh

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