PIC18F26K80-E/SP Microchip Technology Inc., PIC18F26K80-E/SP Datasheet - Page 233

• Manufacturer Part Number: PIC18F26K80-E/SP
• Description: 28 SPDIP .300IN TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F26K80-E/SP

• A/d Inputs: 8-Channel, 12-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 64K Bytes
• Ram Size: 3.6K Bytes
• Speed: 64 MHz
• Temperature Range: –40 to 125 °C
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

16.3
Timer3 can be configured for 16-bit reads and writes
(see
(T3CON<1>) is set, the address for TMR3H is mapped
to a buffer register for the high byte of Timer3. A read
from TMR3L will load the contents of the high byte of
Timer3 into the Timer3 High Byte Buffer register. This
provides users with the ability to accurately read all
16 bits of Timer3 without having to determine whether a
read of the high byte, followed by a read of the low byte,
has become invalid due to a rollover between reads.
A write to the high byte of Timer3 must also take place
through the TMR3H Buffer register. The Timer3 high
byte is updated with the contents of TMR3H when a
write occurs to TMR3L. This allows users to write all
16 bits to both the high and low bytes of Timer3 at once.
The high byte of Timer3 is not directly readable or
writable in this mode. All reads and writes must take
place through the Timer3 High Byte Buffer register.
Writes to TMR3H do not clear the Timer3 prescaler.
The prescaler is only cleared on writes to TMR3L.
 2011 Microchip Technology Inc.
Figure
Timer3 16-Bit Read/Write Mode
16.3). When the RD16 control bit
Preliminary
PIC18F66K80 FAMILY
16.4
The SOSC internal oscillator may be used as the clock
source for Timer3. It can be enabled in one of these
ways:
• Setting the SOSCEN bit in either the T1CON or
• Setting the SOSCGO bit in the OSCCON2 register
• Setting the SCS bits to secondary clock source in
The SOSCGO bit is used to warm up the SOSC so that
it is ready before any peripheral requests it.
To use it as the Timer3 clock source, the TMR3CSx bits
must also be set. As previously noted, this also config-
ures Timer3 to increment on every rising edge of the
oscillator source.
The SOSC oscillator is described in
“SOSC Oscillator”
T3CON register (TxCON<3>)
(OSCCON2<3>)
the OSCCON register (OSCCON<1:0> = 01 )
Using the SOSC Oscillator as the
Timer3 Clock Source
.
DS39977C-page 233
Section 14.5