PIC18F26K80-E/SP Microchip Technology Inc., PIC18F26K80-E/SP Datasheet - Page 217

• Manufacturer Part Number: PIC18F26K80-E/SP
• Description: 28 SPDIP .300IN TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F26K80-E/SP

• A/d Inputs: 8-Channel, 12-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 64K Bytes
• Ram Size: 3.6K Bytes
• Speed: 64 MHz
• Temperature Range: –40 to 125 °C
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

14.1
The
displayed in
Timer1 gate.
REGISTER 14-2:
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
Note 1:
TMR1GE
R/W-0
Timer1
Timer1 Gate Control Register
Programming the T1GCON prior to T1CON is recommended.
Register
TMR1GE: Timer1 Gate Enable bit
If TMR1ON = 0 :
This bit is ignored.
If TMR1ON = 1 :
1 = Timer1 counting is controlled by the Timer1 gate function
0 = Timer1 counts regardless of Timer1 gate function
T1GPOL: Timer1 Gate Polarity bit
1 = Timer1 gate is active-high (Timer1 counts when gate is high)
0 = Timer1 gate is active-low (Timer1 counts when gate is low)
T1GTM: Timer1 Gate Toggle Mode bit
1 = Timer1 Gate Toggle mode is enabled
0 = Timer1 Gate Toggle mode is disabled and toggle flip-flop is cleared
Timer1 gate flip-flop toggles on every rising edge.
T1GSPM: Timer1 Gate Single Pulse Mode bit
1 = Timer1 Gate Single Pulse mode is enabled and is controlling Timer1 gate
0 = Timer1 Gate Single Pulse mode is disabled
T1GGO/T1DONE: Timer1 Gate Single Pulse Acquisition Status bit
1 = Timer1 gate single pulse acquisition is ready, waiting for an edge
0 = Timer1 gate single pulse acquisition has completed or has not been started
This bit is automatically cleared when T1GSPM is cleared.
T1GVAL: Timer1 Gate Current State bit
Indicates the current state of the Timer1 gate that could be provided to TMR1H:TMR1L; unaffected by
Timer1 Gate Enable (TMR1GE) bit.
T1GSS<1:0>: Timer1 Gate Source Select bits
11 = Comparator 2 output
10 = Comparator 1 output
01 = TMR2 to match PR2 output
00 = Timer1 gate pin
Gate
T1GPOL
R/W-0
T1GCON: TIMER1 GATE CONTROL REGISTER
Control
14-2, is used to control the
W = Writable bit
‘1’ = Bit is set
T1GTM
R/W-0
register
(T1GCON),
T1GSPM
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
T1GGO/T1DONE
PIC18F66K80 FAMILY
R/W-0
T1GVAL
(1)
R-x
x = Bit is unknown
T1GSS1
R/W-0
DS39977C-page 217
T1GSS0
R/W-0
bit 0