PIC18F26K80-E/SP Microchip Technology Inc., PIC18F26K80-E/SP Datasheet - Page 372

• Manufacturer Part Number: PIC18F26K80-E/SP
• Description: 28 SPDIP .300IN TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F26K80-E/SP

• A/d Inputs: 8-Channel, 12-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 64K Bytes
• Ram Size: 3.6K Bytes
• Speed: 64 MHz
• Temperature Range: –40 to 125 °C
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

PIC18F66K80 FAMILY
23.3
For the A/D Converter to meet its specified accuracy,
the Charge Holding (C
to fully charge to the input channel voltage level. The
analog input model is shown in
source impedance (R
switch (R
required to charge the capacitor C
switch (R
(V
The source impedance affects the offset voltage at the
analog input (due to pin leakage current). The maxi-
mum recommended impedance for analog sources
is 2.5 k . After the analog input channel is selected or
changed, the channel must be sampled for at least the
minimum acquisition time before starting a conversion.
EQUATION 23-1:
EQUATION 23-2:
EQUATION 23-3:
DS39977C-page 372
T
V
or
T
T
T
T
Temperature coefficient is only required for temperatures > 25C. Below 25C, T
T
T
ACQ
DD
Note:
C
ACQ
AMP
COFF
C
ACQ
HOLD
).
=
=
A/D Acquisition Requirements
SS
=
=
=
=
=
SS
=
=
When the conversion is started, the
holding capacitor is disconnected from the
input pin.
) impedance varies over the device voltage
Amplifier Settling Time + Holding Capacitor Charging Time + Temperature Coefficient
T
) impedance directly affect the time
AMP
T
0.2 s
(Temp – 25C)(0.02 s/C)
(85C – 25C)(0.02 s/C)
1.2 s
-(C
-(25 pF) (1 k + 2 k + 2.5 k) ln(0.0004883) s
1.05 s
0.2 s + 1.05 s + 1.2 s
2.45 s
(V
-(C
AMP
HOLD
+ T
REF
HOLD
+ T
C
HOLD
– (V
ACQUISITION TIME
A/D MINIMUM CHARGING TIME
CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME
S
+ T
)(R
C
) and the internal sampling
)(R
+ T
REF
COFF
IC
) capacitor must be allowed
IC
+ R
COFF
/2048)) • (1 – e
+ R
SS
SS
HOLD
+ R
+ R
Figure
S
S
) ln(1/2048) s
. The sampling
) ln(1/2048)
(-T
23-5. The
C
/C
HOLD
Preliminary
(R
IC
+ R
SS
+ R
S
To
Equation 23-1
that 1/2 LSb error is used (1,024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
Equation 23-3
required acquisition time, T
based
assumptions:
))
C
Rs
Conversion Error  1/2 LSb
V
Temperature
)
HOLD
DD
calculate
on
COFF
shows the calculation of the minimum
the
can be used. This equation assumes
= 0 ms.
the
= 25 pF
= 2.5 k 
= 3V  Rss = 2 k 
= 85  C (system max.)
following
minimum
 2011 Microchip Technology Inc.
ACQ
. This calculation is
application
acquisition
system
time,