PIC18F26K80-E/SP Microchip Technology Inc., PIC18F26K80-E/SP Datasheet - Page 588

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PIC18F26K80-E/SP

Manufacturer Part Number
PIC18F26K80-E/SP
Description
28 SPDIP .300IN TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F26K80-E/SP

A/d Inputs
8-Channel, 12-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
24
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
64K Bytes
Ram Size
3.6K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
2-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F26K80-E/SP
Manufacturer:
SILICON
Quantity:
210
PIC18F66K80 FAMILY
FIGURE 31-21:
TABLE 31-26: A/D CONVERSION REQUIREMENTS
DS39977C-page 588
130
131
132
135
TBD
Note 1:
Param
No.
Note 1:
A/D DATA
SAMPLE
A/D CLK
2:
3:
4:
ADRES
BSF ADCON0, GO
T
T
T
T
T
Symbol
ADIF
AD
CNV
ACQ
SWC
DIS
2:
GO
Q4
The time of the A/D clock period is dependent on the device frequency and the T
ADRES registers may be read on the following T
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (V
On the following cycle of the device clock.
If the A/D clock source is selected as RC, a time of T
be executed.
This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
132
A/D Clock Period
Conversion Time
(not including acquisition time)
Acquisition Time
Switching Time from Convert  Sample
Discharge Time
A/D CONVERSION TIMING
(Note 2)
Characteristic
DD
11
(3)
to V
10
SS
or V
OLD_DATA
SS
9
(2)
Preliminary
to V
. . .
SAMPLING STOPPED
CY
DD
is added before the A/D clock starts. This allows the SLEEP instruction to
). The source impedance ( R
CY
. . .
131
130
cycle.
Min
0.8
1.4
1.4
0.2
14
2
(Note 4)
12.5
25
Max
15
1
3
1
(1)
(1)
Units
T
 s
 s
 s
 s
 s
 s
AD
0
S
 2011 Microchip Technology Inc.
) on the input channels is 50  .
T
V
V
A/D RC mode
V
-40°C to +125°C
-40°C to +125°C
OSC
REF
DD
DD
AD
= 3.0V; T
= 3.0V; A/D RC mode
based, V
full range
clock divider.
NEW_DATA
DONE
Conditions
T
CY
OSC
REF
(Note 1)
based,
 3.0V

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