MC68HC711KS2CFN3 Freescale Semiconductor, MC68HC711KS2CFN3 Datasheet - Page 139

• Manufacturer Part Number: MC68HC711KS2CFN3
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC711KS2CFN3

• Cpu Family: HC11
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI/SPI
• Program Memory Type: ROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 1KB
• # I/os (max): 51
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 68
• Package Type: PLCC
• Lead Free Status / Rohs Status: Not Compliant

6.4 Port B
M68HC11K Family
MOTOROLA
Single-Chip/Boot:
Expanded/Test: ADDR15
Address: $0004
Address: $0002
The state of port B (PB[7:0]) at reset is mode dependent. In single-chip
or bootstrap modes, port B pins are high-impedance inputs with
selectable internal pullup resistors (see
Resistors). Writes to DDRB can change any of the bits to outputs. In
expanded or test modes, port B pins provide the high-order address
lines ADDR[15:8] for external memory devices.
DDB[7:0] — Data Direction for Port B Bits
Reset:
Reset:
Read:
Read:
Write:
Write:
Freescale Semiconductor, Inc.
Figure 6-4. Port B Data Direction Register (DDRB)
For More Information On This Product,
0 = Input
1 = Output
DDB7
Figure 6-3. Port B Data Register (PORTB)
PB7I
Bit 7
Bit 7
PB7
0
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Parallel Input/Output
ADDR14
DDB6
PB6
PB6
6
6
0
ADDR13
DDB5
PB5
PB5
5
5
0
Undefined after reset
ADDR12
DDB4
PB4
PB4
4
4
0
6.11 Internal Pullup
ADDR11
DDB3
PB3
PB3
3
3
0
ADDR10
DDB2
PB2
PB2
2
2
0
Parallel Input/Output
ADDR9
DDB1
PB1
PB1
1
1
0
Technical Data
ADDR8
DDB0
Bit 0
Bit 0
PB0
PB0
Port B
0
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