MC68HC711KS2CFN3 Freescale Semiconductor, MC68HC711KS2CFN3 Datasheet - Page 179
MC68HC711KS2CFN3
Manufacturer Part Number
MC68HC711KS2CFN3
Description
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68HC711KS2CFN3.pdf
(290 pages)
Specifications of MC68HC711KS2CFN3
Cpu Family
HC11
Device Core Size
8b
Frequency (max)
4MHz
Interface Type
SCI/SPI
Program Memory Type
ROM
Program Memory Size
32KB
Total Internal Ram Size
1KB
# I/os (max)
51
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
68
Package Type
PLCC
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC711KS2CFN3
Manufacturer:
NSC
Quantity:
1 001
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8.6.5 System Configuration Options 2
M68HC11K Family
MOTOROLA
Address: $0038
1. Not available on M68HC11K devices
LSBF — Least Significant Bit First Enable Bit
SPR2 — SPI Clock Rate Select Bit
Reset:
Read:
Write:
Figure 8-7. System Configuration Options 2 Register (OPT2)
Setting LSBF causes data to be transmitted LSB first (the default is
MSB first). LSBF does not affect bit positions in the data register;
reads and writes always have MSB in bit 7.
SPR2 adds a divide-by-4 prescaler to the SPI clock chain. With the
two bits in the SPCR, this specifies the SPI clock rate. See
Freescale Semiconductor, Inc.
For More Information On This Product,
LIRDV
Bit 7
0
Serial Peripheral Interface (SPI)
Go to: www.freescale.com
CWOM
6
0
STRCH
5
0
(1)
IRVNE
—
4
LSBF
3
0
Serial Peripheral Interface (SPI)
SPR2
2
0
XDV1
1
0
Technical Data
SPI Registers
Table
XDV0
Bit 0
0
8-1.
179
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