ACS8520T Semtech, ACS8520T Datasheet - Page 117

• Manufacturer Part Number: ACS8520T
• Description: Synchronous Equipment Timing Source (SETS) for Stratum 3/4E/4 and SMC Systems
• Manufacturer: Semtech

Address (hex):
Address (hex):
Revision 3.02/October 2005 © Semtech Corp.
ADVANCED COMMUNICATIONS
Register Name
Register Name
Bit No.
Bit No.
Bit 7
[2:0]
Bit 7
[6:4]
7
3
6A (cont...)
6B
cnfg_T4_DPLL_damping
Description
T4_damping
Register to configure the damping factor of the T4
DPLL. The bit values corresponds to different
damping factors, depending on the bandwidth
selected. Damping factor of 5 being the default
(011).
The Gain Peak for the Damping Factors given in the
Value Description (right) are tabulated below.
Damping Factor
cnfg_T0_DPLL_damping
Description
Not used.
T0_PD2_gain_alog_8k
Register to control the gain of the Phase Detector 2
when locking to a reference of 8 kHz or less in
analog feedback mode. This setting is only used if
automatic gain selection is enabled in Reg. 6D Bit 7,
cnfg_T0_DPLL_PD2_gain.
Not used.
Bit 6
Bit 6
10
20
1.2
2.5
5
T4_PD2_gain_alog_8k
T0_PD2_gain_alog_8k
Bit 5
Bit 5
Description
Gain Peak
0.4 dB
0.2 dB
0.1 dB
0.06 dB
0.03 dB
Description
Bit 4
Bit 4
FINAL
Page 117
(R/W) Register to configure the
damping factor of the T4 DPLL,
along with the gain of Phase
Detector 2 in some modes.
(R/W) Register to configure the
damping factor of the T0 DPLL,
along with the gain of the Phase
Detector 2 in some modes.
Bit Value
Bit Value
Bit 3
Bit 3
001
010
011
100
101
000
110
111
-
-
-
Value Description
T4 DPLL damping factor at the following bandwidths
frequency selections:
18 Hz
1.2
2.5
5
5
5
Not used.
Not used.
Not used.
Value Description
-
Gain value of the Phase Detector 2 when locking to
an 8 kHz reference in analog feedback mode.
-
Bit 2
Bit 2
35 Hz
1.2
2.5
5
10
10
Default Value
Default Value
ACS8520 SETS
70 Hz
1.2
2.5
5
10
20
T4_damping
T0_damping
Bit 1
Bit 1
DATASHEET
www.semtech.com
0001 0011
0001 0011
Bit 0
Bit 0