ACS8520T Semtech, ACS8520T Datasheet - Page 29

• Manufacturer Part Number: ACS8520T
• Description: Synchronous Equipment Timing Source (SETS) for Stratum 3/4E/4 and SMC Systems
• Manufacturer: Semtech

Bits [3:0], or changed via the T4 priority (Reg. 18 to 1E,
when Reg. 4B, Bit 4 = 1).
Consequently the phase detector from the T4 DPLL could
be used to measure the phase difference between the
currently selected source and the stand-by source, or it
could be used to measure the phase wander of all stand-
by sources with respect to the current source by selecting
each input in sequence. An MTIE and TDEV calculation
could be made for each input via external processing.
Configuration for Redundancy Protection
When two ACS8520 devices are to be used in a
redundancy-protection scheme within a Network Element
(NE), one will be designated as Master, one as Slave.
Table 11 How to Align Outputs of Two ACS8520
Devices
Revision 3.02/October 2005 © Semtech Corp.
ADVANCED COMMUNICATIONS
If possible, one device (the
nominated Slave) should lock to
the other device (the nominated
Master).
All programmed priorities within
the two devices should be the
same, except for the fact that
(1)the Master output is
designated the highest priority
input on the Slave.(2) the Slave
output is designated zero priority
(disabled) on the Master.
(Reg. 18 to 1E)
Any input detected as invalid in
one device should be disabled
within the other device.
(Reg. 0E/0F & 30/31)
Phase Build-out should be
disabled on the Slave whilst it is
locked to the Master.
Revertive mode should be
enabled.
The bandwidth of the Slave
should be set higher than that of
the Master (it is recommended to
configure the slave with the
highest supported bandwidth).
Action
With the Slave locked to the
Master, their output frequencies
will be guaranteed to be the
same.
These two actions ensure that if
the Master device fails, the Slave
device will switch to lock to the
same source that the Master was
locked to before it failed.
This will ensure that the phase of
the Slave is locked to the phase
of the Master. It also enables the
use of the Phase offset control
register to compensate for delays
between the Master and Slave.
This will ensure that the Slave
locks to the Master although it
may have been locked to another
source previously.
This ensures that any transient
occurring on the output of the
Master is followed as closely as
possible on the Slave.
Result
FINAL
Page 29
It is expected that an NE will use the T0 output for its
internal operations. The phase of the outputs from the T4
path (TO8 & TO9) will not be aligned, unless the T4
outputs are locked to the T0 outputs.
In many applications, the clocks supplied into the system
are required to be aligned not only in frequency, but also
in phase between the Master and Slave devices. This
ensures minimal disturbance when any clock sink
switches between Master and Slave.
In order to ensure that the outputs of the two ACS8520s
are always aligned in frequency and phase, the
procedures in Table 11 should be followed.
In order to maintain the conditions outlined in Table 11 it
is necessary for software systems to maintain monitoring
and control functions. These monitoring functions should
either poll the device or respond to interrupts in order to
maintain the correct settings within the two devices.
Please refer to the descriptions or registers mentioned in
Table 11 and also Regs 34, 3B, 48, 67 and 69, for more
details on these associated settings. See also Application
Note AN-SETS-7.
Table 12 MSTSLVB Pin Operation
1 =
Master
MSTSLVB
Priority of
input I11
Phase
Build-out
Revertive
mode
T0 DPLL
bandwidth
Feature
As programmed
(program 0 to
ensure it gets
disabled)
As programmed in
register.
As programmed in
register.
As programmed in
register (automatic
or manual).
Setting
ACS8520 SETS
Make sure that the
designated Master
device cannot lock to
the output of the
Slave device.
If the system
requires PBO, then
this being enabled
on the Master will
give the overall
system performance
with PBO. The slave
only needs to track
the Master (no PBO).
Revertive behavior of
the Master in a
Master/Slave
system will define
the overall Revertive
behavior of the
system.
Device selects
locked or acquisition
bandwidth.
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