ACS8520T Semtech, ACS8520T Datasheet - Page 126

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ACS8520T

Manufacturer Part Number
ACS8520T
Description
Synchronous Equipment Timing Source (SETS) for Stratum 3/4E/4 and SMC Systems
Manufacturer
Semtech
Datasheet
Address (hex):
Address (hex):
Address (hex):
Revision 3.02/October 2005 © Semtech Corp.
ADVANCED COMMUNICATIONS
Register Name
Register Name
Register Name
Bit No.
Bit No.
Bit No.
Bit 7
[7:0]
Bit 7
[7:0]
Bit 7
[7:6]
77
78
79
sts_current_phase
[7:0]
Description
current_phase
Bits [7:0] of the current phase register. See Reg. 78
sts_current_phase [15:8] for details.
sts_current_phase
[15:8]
Description
current_phase
Bits [15:8] of the current phase register. This
register is used to read either from the phase
detector of either the T0 DPLL or the T4 DPLL,
according to Reg. 4B Bit 4 T4_T0_select. The value
is averaged in the phase averager before being
made available.
cnfg_phase_alarm_timeout
Description
Not used.
Bit 6
Bit 6
Bit 6
Bit 5
Bit 5
Bit 5
Description
Description
Description
Bit 4
Bit 4
Bit 4
current_phase[15:8]
current_phase[7:0]
FINAL
Page 126
(RO) Bits [7:0] of the current
phase register.
(RO) Bits [15:8] of the current
phase register.
(R/W) Register to configure how
long before a phase alarm is
raised on an input
Bit Value
Bit Value
Bit Value
Bit 3
Bit 3
Bit 3
-
-
-
timeout_value
Value Description
See Reg. 78 sts_current_phase [15:8] for details.
Value Description
The value in this register should be concatenated
with the value in Reg. 77 sts_current_phase [7:0].
This 16-bit value is a 2’s complement signed
integer. The value multiplied by 0.707 is the
averaged value of the current phase error, in
degrees, as measured at the DPLL’s phase
detector.
Value Description
-
Bit 2
Bit 2
Bit 2
Default Value
Default Value
Default Value
ACS8520 SETS
Bit 1
Bit 1
Bit 1
DATASHEET
www.semtech.com
0000 0000
0000 0000
0011 0010
Bit 0
Bit 0
Bit 0

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