ACS8520T Semtech, ACS8520T Datasheet - Page 127

• Manufacturer Part Number: ACS8520T
• Description: Synchronous Equipment Timing Source (SETS) for Stratum 3/4E/4 and SMC Systems
• Manufacturer: Semtech

Address (hex):
Address (hex):
Revision 3.02/October 2005 © Semtech Corp.
ADVANCED COMMUNICATIONS
Register Name
Register Name
2k_8k_from_T4
Bit No.
Bit No.
Bit 7
[5:0]
Bit 7
[6:4]
7
3
2
1
79 (cont...)
7A
cnfg_phase_alarm_timeout
Description
timeout_value
Phase alarms can only be raised on an input when
the T0 DPLL is attempting to lock to it. Once an
input has been rejected due to a phase alarm, there
is no way to measure whether it is good again,
because it is no longer selected by the DPLL. The
phase alarms can either remain until reset by
software, or time-out after 128 second, as selected
in Reg. 34 Bit 6, phalarm_timeout
cnfg_sync_pulses
Description
2k_8k_from_T4
Register to select the source (T0 or T4) for the 2 kHz
and 8 kHz outputs available from TO1 to TO7.
Not used.
8k_invert
Register bit to invert the 8 kHz output from TO10.
8k_pulse
Register bit to enable the 8 kHz output from TO10
to be either pulsed or 50:50 duty cycle. Output TO3
must be enabled to use “pulsed output” mode on
output TO10, and then the pulse width on TO10 will
be defined by the period of the output programmed
on TO3.
2k_invert
Register bit to invert the 2 kHz output from TO11.
Bit 6
Bit 6
Bit 5
Bit 5
Description
Description
Bit 4
Bit 4
FINAL
Page 127
(R/W) Register to configure how
long before a phase alarm is
raised on an input
(R/W) Register to configure the
Sync outputs available from TO10
and TO11 and select the source
for the 2 kHz and 8 kHz outputs
from T01 - TO7.
8k_invert
Bit Value
Bit Value
Bit 3
Bit 3
0
1
0
1
0
1
0
1
-
-
timeout_value
Value Description
This 6-bit unsigned integer represents the length of
time before a phase alarm will be raised on an
input. The value multiplied by 2 gives the time in
seconds. This time value is the time that the
controlling state machine will spend in Pre-locked,
Pre-locked2 or Phase-lost modes before setting the
phase alarm on the selected input.
8k_pulse
Value Description
2/8 kHz on TO1-TO7 generated from the T0 DPLL.
2/8 kHz on TO1-TO7 generated from the T4 DPLL.
-
8 kHz TO10 output not inverted.
8 kHz TO10 output inverted.
8 kHz TO10 output not pulsed.
8 kHz TO10 output pulsed.
2 kHz TO11 output not inverted.
2 kHz TO11 output inverted.
Bit 2
Bit 2
Default Value
Default Value
2k_invert
ACS8520 SETS
Bit 1
Bit 1
DATASHEET
www.semtech.com
0011 0010
0000 0000
2k_pulse
Bit 0
Bit 0