ACS8520T Semtech, ACS8520T Datasheet - Page 84

• Manufacturer Part Number: ACS8520T
• Description: Synchronous Equipment Timing Source (SETS) for Stratum 3/4E/4 and SMC Systems
• Manufacturer: Semtech

Address (hex):
Address (hex):
Revision 3.02/October 2005 © Semtech Corp.
ADVANCED COMMUNICATIONS
Register Name
auto_extsync_
en
Register Name
lock_T4_to_T0
Bit No.
Bit No.
Bit 7
Bit 7
1
0
7
6
5
4
34 (cont...)
35
cnfg_input_mode
phalarm_time-
out
Description
master_slaveb (R/O)
Bit to reflect the value of the MASTSLVB pin.
*As this always reflects the value on the pin, the
default value of this bit will be according to the
value on the pin at power-up. For software control,
set MASTSLVB pin to Master mode at all times and
program the individual registers (as per Value
Description) to give Master or Slave mode
functionality.
reversion_mode
Bit to select Revertive/Non-revertive mode. When in
Non-revertive mode, the device will not
automatically switch to a higher priority source,
unless the current source fails. When in Revertive
mode the device will always select the highest
priority source.
cnfg_T4_path
T4_dig_feed-
back
Description
lock_T4_to_T0
Bit selects either the T4 direct inputs, or T0 DPLL as
the input of the T4 path. This allows the T4 DPLL to
be used to produce different sets of frequencies to
the T0 DPLL but still maintain lock.
T4_dig_feedback
Bit to select digital feedback mode for the T4 DPLL.
Not used.
T4_op_from_T0
Bit 6
Bit 6
XO_edge
Bit 5
Bit 5
Description
man_holdover
Description
T4_op_from_T0
Bit 4
Bit 4
FINAL
Page 84
(Bit 1 RO, otherwise R/W)
Register controlling various input
modes of the device.
extsync_en
Register to configure the inputs
and other features in the T4 path.
Bit Value
Bit Value
Bit 3
Bit 3
0
1
0
1
0
1
0
1
0
1
-
ip_sonsdhb
Value Description
Slave mode.
I11 set to highest priority.
T0 DPLL set to acquisition bandwidth.
Revertive mode enabled.
Phase Build-out disabled.
Master mode.
I11 priority, T0 DPLL bandwidth, Revertive mode,
Phase Build-out, all as programmed in the registers.
Non-revertive mode.
Revertive mode.
Value Description
T4 path locks independently from the T0 path.
T4 DPLL locks to the output of the T0 DPLL.
T4 DPLL in analog feedback mode.
T4 DPLL in digital feedback mode.
-
T08 and T09 will be generated from T4 DPLL
T08 and T09 will be generated from T0 DPLL
T4_forced_reference_source
Bit 2
Bit 2
Default Value
master_slaveb
Default Value
ACS8520 SETS
Bit 1
Bit 1
DATASHEET
www.semtech.com
1100 0010*
reversion_mode
0100 0000
Bit 0
Bit 0