ACS8520T Semtech, ACS8520T Datasheet - Page 15

• Manufacturer Part Number: ACS8520T
• Description: Synchronous Equipment Timing Source (SETS) for Stratum 3/4E/4 and SMC Systems
• Manufacturer: Semtech

higher priority source. When there is a reference available
with higher priority than the selected reference, there will
be NO change of reference source as long as the Non-
revertive mode remains on, and the currently selected
source is valid. A failure of the selected reference will
always trigger a switch-over regardless of whether
Revertive or Non-revertive mode has been chosen.
Also, in a Master/Slave redundancy-protection scheme,
the Slave device(s) must follow the Master device. The
alignment of the Master and Slave devices is part of the
protection mechanism. The availability of each source is
determined by a combination of local and remote
monitoring of each source. Each input reference source
supplied to each ACS8520 device is monitored locally and
the results are made available to other devices.
Forced Control Selection
A configuration register, force_select_reference_source
Reg. 33, controls both the choice of automatic or forced
selection and the selection itself (when forced selection is
required). For Automatic choice of source selection, the 4
LSB bit value is set to all zeros or all ones (default). To
force a particular input (I
Forced selection is not the normal mode of operation, and
the force_select_reference_source variable is defaulted
to the all-ones value on reset, thereby adopting the
automatic selection of the reference source.
Automatic Control Selection
When an automatic selection is required, the
force_select_reference_source register LSB 4 bits must
be set to all zeros or all ones. The configuration registers,
cnfg_ref_selection_priority, held in the µP port block,
consist of seven, 8-bit registers organized as one 4-bit
register per input reference port. Each register holds a
4-bit value which represents the desired priority of that
particular port. Unused ports should be given the value,
0000, in the relevant register to indicate they are not to
be included in the priority table. On power-up, or following
a reset, the whole of the configuration file will be
defaulted to the values defined by Table 4. The selection
priority values are all relative to each other, with lower-
valued numbers taking higher priorities. Each reference
source should be given a unique number; the valid values
are 1 to 15 (dec). A value of zero disables the reference
source. However if two or more inputs are given the same
priority number those inputs will be selected on a first in,
first out basis. If the first of two same priority number
sources goes invalid the second will be switched in. If the
Revision 3.02/October 2005 © Semtech Corp.
ADVANCED COMMUNICATIONS
n)
, the Bit value is set to n (bin).
FINAL
Page 15
first then becomes valid again, it becomes the second
source on the first in, first out basis, and there will not be
a switch. If a third source with the same priority number
as the other two becomes valid, it joins the priority list on
the same first in, first out basis. There is no implied priority
based on the channel numbers. Revertive/Non-revertive
mode has no effect on sources with the same priority
value.
The input port I11 is also for the connection of the
synchronous clock of the T0 output of the Master device
(or the active-Slave device), to be used to align the T0
output with the Master (or active-Slave) device if this
device is acting in a subordinate-Slave or subordinate-
Master role.
Ultra Fast Switching
A reference source is normally disqualified after the Leaky
Bucket monitor thresholds have been crossed. An option
for a faster disqualification has been implemented,
whereby if Reg. 48 Bit 5 (ultra_fast_switch) is set, then a
loss of activity of just a few reference clock cycles will set
the main_ref_failed alarm and cause a reference switch.
This can be configured (see Reg. 06, Bit 6) to cause an
interrupt to occur instead of, or as well as, causing the
reference switch.
The sts_interrupts register Reg. 06 Bit 6 (main_ref_failed)
is used to flag inactivity on the reference that the device
is locked to much faster than the activity monitors can
support. If Reg. 48 Bit 6 of the cnfg_monitors register
(los_flag_on_TDO) is set, then the state of this bit is driven
onto the TDO pin of the device.
Note...The flagging of the loss of the main reference failure on
TDO is simply allowing the status of the sts_interrupt bit
main_ref_failed (Reg. 06 Bit 6) to be reflected in the state of
the TDO output pin. The pin will, therefore, remain High until
the interrupt is cleared. This functionality is not enabled by
default so the usual JTAG functions can be used. When the
TDO output from the ACS8520 is connected to the TDI pin of
the next device in the JTAG scan chain, the implementation
should be such that a logic change caused by the action of the
interrupt on the TDI input should not effect the operation when
JTAG is not active.
Fast External Switching Mode-SCRSW Pin
Fast external switching mode, for fast switching between
inputs I3 or I5 and I4 or I6, can also be triggered directly
from a dedicated pin SRCSW (Figure 4), once the mode
has been initialized.
ACS8520 SETS
DATASHEET
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