ACS8520T Semtech, ACS8520T Datasheet - Page 119

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ACS8520T

Manufacturer Part Number
ACS8520T
Description
Synchronous Equipment Timing Source (SETS) for Stratum 3/4E/4 and SMC Systems
Manufacturer
Semtech
Datasheet
Address (hex):
Address (hex):
Revision 3.02/October 2005 © Semtech Corp.
ADVANCED COMMUNICATIONS
Register Name
T4_PD2_gain_
enable
Register Name
T0_PD2_gain_
enable
Bit No.
Bit No.
Bit 7
[6:4]
[2:0]
Bit 7
[6:4]
3
7
3
6C (cont...)
6D
cnfg_T4_DPLL_PD2_gain
Description
T4_PD2_gain_alog
Register to control the gain of Phase Detector 2
when locking to a reference, higher than 8 kHz, in
analog feedback mode. This setting is not used if
automatic gain selection is disabled in Bit 7,
T4_PD2_gain_enable.
Not used.
T4_PD2_gain_digital
Register to control the gain of Phase Detector 2
when locking to a reference in digital feedback
mode. This setting is always used if automatic gain
selection is disabled in Bit 7, T4_PD2_gain_enable.
cnfg_T0_DPLL_PD2_gain
Description
T0_PD2_gain_enable
T0_PD2_gain_alog
Register to control the gain of Phase Detector 2
when locking to a reference, higher than 8 kHz, in
analog feedback mode. This setting is not used if
automatic gain selection is disabled in Bit 7,
T0_PD2_gain_enable.
Not used.
Bit 6
Bit 6
T4_PD2_gain_alog
T0_PD2_gain_alog
Bit 5
Bit 5
Description
Description
Bit 4
Bit 4
FINAL
Page 119
(R/W) Register to configure the
gain of Phase Detector 2 in some
modes for the T4 DPLL.
(R/W) Register to configure the
gain of Phase Detector 2 in some
modes for the T0 DPLL.
Bit Value
Bit Value
Bit 3
Bit 3
0
1
-
-
-
-
-
Value Description
Gain value of Phase Detector 2 when locking to a
high frequency reference in analog feedback mode.
-
Gain value of Phase Detector 2 when locking to any
reference in digital feedback mode.
Value Description
T0 DPLL Phase Detector 2 not used.
T0 DPLL Phase Detector 2 gain enabled and choice
of gain determined according to the locking mode:
- digital feedback mode
- analog feedback mode
- analog feedback at 8 kHz.
Gain value of Phase Detector 2 when locking to a
high frequency reference in analog feedback mode.
-
Bit 2
Bit 2
T4_PD2_gain_digital
T0_PD2_gain_digital
Default Value
Default Value
ACS8520 SETS
Bit 1
Bit 1
DATASHEET
www.semtech.com
1100 0010
1100 0010
Bit 0
Bit 0

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