ACS8520T Semtech, ACS8520T Datasheet - Page 67

• Manufacturer Part Number: ACS8520T
• Description: Synchronous Equipment Timing Source (SETS) for Stratum 3/4E/4 and SMC Systems
• Manufacturer: Semtech

Address (hex):
Address (hex):
Revision 3.02/October 2005 © Semtech Corp.
ADVANCED COMMUNICATIONS
Register Name
Register Name
Bit No.
Bit No.
Bit 7
[7:0]
Bit 7
[7:0]
0C
0D
sts_current_DPLL_frequency
[7:0]
Description
Bits [7:0] of sts_current_DPLL_frequency
*When Bit 4 (T4_T0_select) of Reg. 4B
(cnfg_registers_source_select) = 0 the frequency
for the T0 path is reported.
When this Bit 4 = 1 the frequency for the T4 path is
reported.
sts_current_DPLL_frequency
[15:8]
Description
sts_current_DPLL_frequency[15:8]
This value in this register is combined with the value
in Reg. 0C and Reg. 07 to represent the current
frequency offset of the DPLL.
*When Bit 4 (T4_T0_select) of Reg. 4B
(cnfg_registers_source_select) = 0 the frequency
for the T0 path is reported.
When this Bit 4 = 1 the frequency for the T4 path is
reported.
Bit 6
Bit 6
Bit 5
Bit 5
Bits [7:0] of sts_current_DPLL_frequency
sts_current_DPLL_frequency[15:8]
Description
Description
Bit 4
Bit 4
FINAL
Page 67
(RO) Bits [7:0] of the current DPLL
frequency.
(RO) Bits [15:8] of the current
DPLL frequency.
Bit Value
Bit Value
Bit 3
Bit 3
-
-
Value Description
See register description of
sts_current_DPLL_frequency at address 0D hex.
Value Description
In order to calculate the ppm offset of the DPLL with
respect to the crystal oscillator frequency, the value
in Reg. 07, Reg. 0D and Reg. 0C need to be
concatenated. This value is a 2’s complement
signed integer. The value multiplied by
0.0003068 dec will give the value in ppm offset
with respect to the XO frequency, allowing for any
crystal calibration that has been performed, via
cnfg_nominal_frequency, Reg. 3C and 3D. The
value is actually the DPLL integral path value so it
can be viewed as an average frequency, where the
rate of change is related to the DPLL bandwidth. If
Bit 3 of Reg. 3B is High then this value will freeze if
the DPLL has been pulled to its min or max
frequency.
Bit 2
Bit 2
Default Value
Default Value
ACS8520 SETS
Bit 1
Bit 1
DATASHEET
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0000 0000
0000 0000
Bit 0
Bit 0