mc68hc11d0cfn2 Freescale Semiconductor, Inc, mc68hc11d0cfn2 Datasheet - Page 100

• Manufacturer Part Number: mc68hc11d0cfn2
• Description: M68hc11 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Programmable Timer
8.3.2 Timer Input Capture Registers
Data Sheet
100
When an edge has been detected and synchronized, the 16-bit free-running
counter value is transferred into the input capture register pair as a single 16-bit
parallel transfer. Timer counter value captures and timer counter incrementing
occur on opposite half-cycles of the phase two clock so that the count value is
stable whenever a capture occurs. The timer input capture (TICx) registers are not
affected by reset. Input capture values can be read from a pair of 8-bit read-only
registers. A read of the high-order byte of an input capture register pair inhibits a
new capture transfer for one bus cycle. If a double-byte read instruction, such as
LDD, is used to read the captured value, coherency is assured. When a new input
capture occurs immediately after a high-order byte read, transfer is delayed for an
additional cycle but the value is not lost.
Address: $0010 — TIC1 (High)
Address: $0011 — TIC1 (Low)
Address: $0012 — TIC2 (High)
functions only if the I4/O5 bit in PACTL is set. Refer to
configuration.
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Freescale Semiconductor, Inc.
For More Information On This Product,
Bit 15
Bit 15
Bit 15
Bit 15
Bit 7
Bit 7
EDGxB
Figure 8-4. Timer Input Capture Registers (TICx)
0
0
1
1
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= Unimplemented
Table 8-2. Timer Control Configuration
Bit 14
Bit 14
Bit 6
Programmable Timer
14
14
6
EDGxA
0
1
0
1
Bit 13
Bit 13
Bit 5
13
13
5
Capture disabled
Capture on rising edges only
Capture on falling edges only
Capture on any edge
Unaffected by reset
Unaffected by reset
Unaffected by reset
Bit 12
Bit 12
Bit 4
12
12
4
Configuration
Bit 11
Bit 11
Bit 3
11
11
3
Table 8-2
Bit 10
Bit 10
Bit 2
10
10
2
MC68HC711D3 — Rev. 2
Bit 9
Bit 1
Bit 9
for timer control
9
1
9
MOTOROLA
Bit 8
Bit 8
Bit 0
Bit 0
Bit 8
Bit 8