mc68hc11d0cfn2 Freescale Semiconductor, Inc, mc68hc11d0cfn2 Datasheet - Page 54

• Manufacturer Part Number: mc68hc11d0cfn2
• Description: M68hc11 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Resets, Interrupts, and Low-Power Modes
4.3 Interrupts
Data Sheet
54
CR1 and CR0 — COP Timer Rate Selects
Excluding reset-type interrupts, there are 17 hardware interrupts and one software
interrupt that can be generated from all the possible sources. These interrupts can
be divided into two categories: maskable and non-maskable. Fifteen of the
interrupts can be masked using the I bit of the condition code register (CCR). All
the on-chip (hardware) interrupts are individually maskable by local control bits.
The software interrupt is non-maskable. The external input to the XIRQ pin is
considered a non-maskable interrupt because it cannot be masked by software
once it is enabled. However, it is masked during reset and upon receipt of an
interrupt at the XIRQ pin. Illegal opcode is also a non-maskable interrupt.
Table 4-2
as well as the actual condition code and control bits that mask each interrupt.
Figure 4-3
The COP system is driven by a constant frequency of E
specify an additional divide-by value to arrive at the COP timeout rate. These
bits are cleared during reset and can be written only once during the first 64
E-clock cycles after reset in normal modes. The value of these bits is:
$FFDC, $FFDD
$FFDA, $FFDB
$FFC0, $FFC1
$FFD4, $FFD5
$FFD6, $FFD7
$FFD8, $FFD9
Freescale Semiconductor, Inc.
Address
Vector
For More Information On This Product,
provides a list of the interrupts with a vector location in memory for each,
shows the interrupt stacking order.
Resets, Interrupts, and Low-Power Modes
Table 4-2. Interrupt and Reset Vector Assignments
Go to: www.freescale.com
CR1
Reserved
SCI serial system:
SPI serial transfer complete
Pulse accumulator input edge
Pulse accumulator overflow
0
0
1
1
SCI transmit complete
SCI transmit data register empty
SCI idle line detect
SCI receiver overrun
SCI receive data register full
CR0
0
1
0
1
Interrupt Source
Divided By
E
16
64
1
4
2
15
MC68HC711D3 — Rev. 2
2
15
Mask
. These two bits
CCR
I bit
I bit
I bit
I bit
—
MOTOROLA
PAOVI
Local
Mask
TCIE
SPIE
ILIE
RIE
RIE
PAII
TIE
—