mc68hc11d0cfn2 Freescale Semiconductor, Inc, mc68hc11d0cfn2 Datasheet - Page 35

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mc68hc11d0cfn2

Manufacturer Part Number
mc68hc11d0cfn2
Description
M68hc11 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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3.1 Introduction
3.2 CPU Registers
MC68HC711D3 — Rev. 2
MOTOROLA
Data Sheet — MC68HC711D3
This section presents information on M68HC11 central processor unit (CPU):
The CPU is designed to treat all peripheral, input/output (I/O), and memory
locations identically as addresses in the 64-Kbyte memory map. This is referred to
as memory-mapped I/O. I/O has no instructions separate from those used by
memory. This architecture also allows accessing an operand from an external
memory location with no execution time penalty.
M68HC11 CPU registers are an integral part of the CPU and are not addressed as
if they were memory locations. The seven registers, discussed in the following
paragraphs, are shown in
Freescale Semiconductor, Inc.
Architecture
Data types
Addressing modes
Instruction set
Special operations such as subroutine calls and interrupts
For More Information On This Product,
Go to: www.freescale.com
Central Processor Unit (CPU)
Section 3. Central Processor Unit (CPU)
Figure
3-1.
Data Sheet
35

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