mc68hc11d0cfn2 Freescale Semiconductor, Inc, mc68hc11d0cfn2 Datasheet - Page 68
mc68hc11d0cfn2
Manufacturer Part Number
mc68hc11d0cfn2
Description
M68hc11 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC11D0CFN2.pdf
(150 pages)
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Input/Output (I/O) Ports
5.2 Port A
Data Sheet
68
Port A shares functions with the timer system and has:
Pins PA6 and PA4 are not bonded in the 40-pin dual in-line package (DIP), and
their OC output functions are unavailable, but their software interrupts are
available.
PORTA can be read any time. Inputs return the pin level, whereas outputs return
the pin driver input level. If written, PORTA stores the data in an internal latch. It
drives the pins only if they are configured as outputs. Writes to PORTA do not
change the pin state when the pins are configured for timer output compares.
Out of reset, port A bits 7 and 3–0 are general high-impedance inputs, while
bits 6–4 are outputs, driving low. On bidirectional lines PA7 and PA3, the timer
forces the I/O state to be an output if the associated output compare is enabled. In
this case, the data direction bits DDRA7 and DDRA3 in PACTL will not be changed
or have any effect on those bits. When the output compare functions associated
with these pins are disabled, the DDR bits in PACTL govern the I/O state.
Alt. Func.:
Address:
•
•
•
And/Or:
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
Three input only pins
Three output only pins
Two bidirectional I/O pins
For More Information On This Product,
1. This pin is not bonded in the 40-pin version.
$0000
Bit 7
OC1
PA7
Hi-Z
PAI
Go to: www.freescale.com
Figure 5-1. Port A Data Register (PORTA)
Input/Output (I/O) Ports
PA6
OC2
OC1
6
0
(1)
OC3
OC1
PA5
5
0
PA4
OC4
OC1
4
0
(1)
IC4/OC5
OC1
PA3
Hi-Z
3
PA2
Hi-Z
IC1
—
2
MC68HC711D3 — Rev. 2
PA1
Hi-Z
IC2
—
1
MOTOROLA
Bit 0
PA0
Hi-Z
IC3
—
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