mc68hc11d0cfn2 Freescale Semiconductor, Inc, mc68hc11d0cfn2 Datasheet - Page 104

• Manufacturer Part Number: mc68hc11d0cfn2
• Description: M68hc11 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Programmable Timer
8.4.2 Timer Compare Force Register
Data Sheet
104
The timer compare force register (CFORC) allows forced early compares.
FOC1–FOC5 correspond to the five output compares. These bits are set for each
output compare that is to be forced. The action taken as a result of a forced
compare is the same as if there were a match between the OCx register and the
free-running counter, except that the corresponding interrupt status flag bits are not
set. The forced channels trigger their programmed pin actions to occur at the next
timer count transition after the write to CFORC.
The CFORC bits should not be used on an output compare function that is
programmed to toggle its output on a successful compare because a normal
compare that occurs immediately before or after the force can result in an
undesirable operation.
FOC1–FOC5 — Write 1s to Force Compare Bits
Bits 2–0 — Not implemented, always read 0.
Address: $001B — TOC3 (Low)
Address: $001C — TOC4 (High)
Address: $001D — TOC4 (Low)
Address:
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
0 = Not affected
1 = Output x action occurs
Freescale Semiconductor, Inc.
Figure 8-6. Timer Output Capture Registers (TOCx) (Continued)
For More Information On This Product,
$000B
FOC1
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
1
1
1
0
Figure 8-7. Timer Compare Force Register (CFORC)
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FOC2
Bit 14
Bit 6
Bit 6
Programmable Timer
14
6
1
1
6
1
6
0
FOC3
Bit 13
Bit 5
Bit 5
13
5
1
1
5
1
5
0
FOC4
Bit 12
Bit 4
Bit 4
12
4
4
4
1
1
1
0
Bit 11
FOC5
Bit 3
Bit 3
11
3
1
1
3
1
3
0
Bit 10
Bit 2
Bit 2
10
2
1
1
2
1
2
0
0
MC68HC711D3 — Rev. 2
Bit 1
Bit 1
Bit 9
1
1
9
1
1
1
1
0
0
MOTOROLA
Bit 0
Bit 0
Bit 8
Bit 8
Bit 0
Bit 0
Bit 0
1
1
1
0
0