mc68hc11d0cfn2 Freescale Semiconductor, Inc, mc68hc11d0cfn2 Datasheet - Page 114

• Manufacturer Part Number: mc68hc11d0cfn2
• Description: M68hc11 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Programmable Timer
8.7.1 Pulse Accumulator Control Register
Data Sheet
114
NOTE:
In the event counting mode, the 8-bit counter is clocked to increasing values by an
external pin. The maximum clocking rate for the external event counting mode is
the E clock divided by two. In gated time accumulation mode, a free-running
E-clock
activated. Refer to
written at any time.
Pulse accumulator control bits are also located within two timer registers, TMSK2
and TFLG2, as described here.
Four of the pulse accumulator control register (PACTL) bits control an 8-bit pulse
accumulator system. Another bit enables either the OC5 function or the IC4
function, while two other bits select the rate for the real-time interrupt system.
DDRA7 — Data Direction Control for Port A Bit 7
Even when port A bit 7 is configured as an output, the pin still drives the input to
the pulse accumulator.
PAEN — Pulse Accumulator System Enable Bit
PAMOD — Pulse Accumulator Mode Bit
Address:
The pulse accumulator uses port A bit 7 as the PAI input, but the pin can also
be used as general-purpose I/O or as an output compare.
Refer to
Reset:
Read:
Write:
Cycle Time
0 = Pulse accumulator disabled
1 = Pulse accumulator enabled
0 = Event counter
1 = Gated time accumulation
CPU Clock
Freescale Semiconductor, Inc.
(E/2
(E/2
For More Information On This Product,
64 signal drives the 8-bit counter, but only while the external PAI pin is
Figure 8-20. Pulse Accumulator Control Register (PACTL)
DDRA7
$0026
14
Section 5. Input/Output (I/O) Ports
6
Bit 7
)
Table 8-7. Pulse Accumulator Timing in Gated Mode
0
)
Go to: www.freescale.com
Table
PAEN
Programmable Timer
6
0
overflow -
Selected
1 count -
Crystal
(1/E)
8-7. The pulse accumulator counter can be read or
(E)
PAMOD
5
0
PEDGE
16.384 ms
4.0 MHz
1.0 MHz
1000 ns
64.0 µs
4
0
Common XTAL Frequencies
DDRA3
3
0
for more information.
8.192 ms
8.0 MHz
2.0 MHz
32.0 µs
500 ns
I4/O5
2
0
MC68HC711D3 — Rev. 2
RTR1
1
0
12.0 MHz
5.461 ms
21.33 µs
3.0 MHz
333 ns
MOTOROLA
RTR0
Bit 0
0