mc68hc11d0cfn2 Freescale Semiconductor, Inc, mc68hc11d0cfn2 Datasheet - Page 110

• Manufacturer Part Number: mc68hc11d0cfn2
• Description: M68hc11 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Programmable Timer
8.5 Real-Time Interrupt
8.5.1 Timer Interrupt Mask 2 Register
Data Sheet
110
The real-time interrupt feature, used to generate hardware interrupts at a fixed
periodic rate, is controlled and configured by two bits (RTR1 and RTR0) in the
pulse accumulator control (PACTL) register. The RTII bit in the TMSK2 register
enables the interrupt capability. The four different rates available are a product
of the MCU oscillator frequency and the value of bits RTR1 and RTR0. Refer to
Table 8-5
The clock source for the RTI function is a free-running clock that cannot be stopped
or interrupted except by reset. This clock causes the time between successive RTI
timeouts to be a constant that is independent of the software latencies associated
with flag clearing and service. For this reason, an RTI period starts from the
previous timeout, not from when RTIF is cleared.
Every timeout causes the RTIF bit in TFLG2 to be set, and if RTII is set, an interrupt
request is generated. After reset, one entire real-time interrupt period elapses
before the RTIF flag is set for the first time. Refer to the TMSK2, TFLG2, and
PACTL registers.
The timer interrupt mask 2 register (TMSK2) contains the real-time interrupt enable
bits.
TOI — Timer Overflow Interrupt Enable Bit
Address:
Refer to
Reset:
Read:
Write:
and RTR0
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RTR1
0 0
0 1
1 0
1 1
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for the periodic real-time interrupt rates.
$0024
8.4 Output Compare
Bit 7
TOI
Figure 8-16. Timer Interrupt Mask 2 Register (TMSK2)
0
Table 8-5. Periodic Real-Time Interrupt Rates
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E = 1 MHz
10.923 ms
21.845 ms
RTII
Programmable Timer
2.731 ms
5.461 ms
6
0
PAOVI
5
0
(OC).
E = 2 MHz
16.384 ms
32.768 ms
4.096 ms
8.192 ms
PAII
4
0
3
0
0
E = 3 MHz
16.384 ms
32.768 ms
65.536 ms
8.192 ms
2
0
0
MC68HC711D3 — Rev. 2
PR1
1
0
E = X MHz
(E/2
(E/2
(E/2
(E/2
MOTOROLA
13
14
15
16
)
)
)
)
Bit 0
PR0
0