mc68hc11d0cfn2 Freescale Semiconductor, Inc, mc68hc11d0cfn2 Datasheet - Page 94

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mc68hc11d0cfn2

Manufacturer Part Number
mc68hc11d0cfn2
Description
M68hc11 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Serial Peripheral Interface (SPI)
7.7.3 SPI Data I/O Register
Data Sheet
94
NOTE:
The SPI data I/O register (SPDR) is used when transmitting or receiving data on
the serial bus. Only a write to this register initiates transmission or reception of a
byte, and this only occurs in the master device. At the completion of transferring a
byte of data, the SPIF status bit is set in both the master and slave devices.
A read of the SPDR is actually a read of a buffer. To prevent an overrun and the
loss of the byte that caused the overrun, the first SPIF must be cleared by the time
a second transfer of data from the shift register to the read buffer is initiated.
SPI is double buffered in and single buffered out.
Address:
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
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Bit 7
Bit 7
Serial Peripheral Interface (SPI)
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Figure 7-5. SPI Data I/O Register (SPDR)
Bit 6
6
Bit 5
5
Unaffected by reset
Bit 4
4
Bit 3
3
Bit 2
2
MC68HC711D3 — Rev. 2
Bit 1
1
MOTOROLA
Bit 0
Bit 0

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