mc68hc11d0cfn2 Freescale Semiconductor, Inc, mc68hc11d0cfn2 Datasheet - Page 64

• Manufacturer Part Number: mc68hc11d0cfn2
• Description: M68hc11 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Resets, Interrupts, and Low-Power Modes
Data Sheet
64
NOTE:
IRVNE — Internal Read Visibility/Not E
To prevent bus conflicts, when using internal read visibility, the user must disable
all external devices from driving the data bus during any internal access.
PSEL3–PSEL0 — Priority Selects
This bit may be read at any time. It may be written once in any mode. IRVNE is
set during reset in special test mode only, and cleared by reset in the other
modes.
As shown in the table, in single-chip and bootstrap modes IRVNE determines
whether the E clock is driven out or forced low.
These four bits are used to specify one I bit related interrupt source, which then
becomes the highest priority I bit related interrupt source. These bits may be
written only while the I bit in the CCR is set, inhibiting I bit related interrupts. An
interpretation of the value of these bits is shown in
During reset, PSEL3–PSEL0 are initialized to 0101, which corresponds to
reserved (default to IRQ). IRQ becomes the highest priority I bit related interrupt
source.
1 = Data from internal reads is driven out on the external data bus in
0 = Data from internal reads is not visible on the external data bus.
1 = E pin driven low
0 = E clock driven out of the chip
Freescale Semiconductor, Inc.
PSEL3–PSEL0
Single chip
Expanded multiplexed
Bootstrap
Special test
For More Information On This Product,
expanded modes.
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
Resets, Interrupts, and Low-Power Modes
Mode
Table 4-4. Highest Priority Interrupt Selection
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Timer overflow
Pulse accumulator overflow
Pulse accumulator input edge
SPI serial transfer complete
SCI serial system
Reserved (default to IRQ)
IRQ (external pin)
Real-time interrupt
Timer input capture 1
of Reset
IRVNE
Out
0
0
0
1
of Reset
E Clock
Interrupt Source Promoted
Out
On
On
On
On
of Reset
Out
IRV
Off
Off
Off
On
Table
Affects
IRVNE
Only
IRV
IRV
E
E
4-4.
MC68HC711D3 — Rev. 2
be Written
IRVNE
Once
Once
Once
Once
May
MOTOROLA