mc68hc11d0cfn2 Freescale Semiconductor, Inc, mc68hc11d0cfn2 Datasheet - Page 112

• Manufacturer Part Number: mc68hc11d0cfn2
• Description: M68hc11 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Programmable Timer
8.5.3 Pulse Accumulator Control Register
Data Sheet
112
Bits RTR1 and RTR0 of the pulse accumulator control register (PACTL) select the
rate for the real-time interrupt system. Bit DDRA3 determines whether port A bit
three is an input or an output when used for general-purpose I/O. The remaining
bits control the pulse accumulator.
DDRA7 — Data Direction Control for Port A Bit 7
PAEN — Pulse Accumulator System Enable Bit
PAMOD — Pulse Accumulator Mode Bit
PEDGE — Pulse Accumulator Edge Control Bit
DDRA3 — Data Direction Register for Port A Bit 3
I4/O5 — Input Capture 4/Output Compare 5 Bit
RTR1 and RTR0 — RTI Interrupt Rate Select Bits
Address:
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
These two bits determine the rate at which the RTI system requests interrupts.
The RTI system is driven by an E divided by 2
so it is independent of the timer prescaler. These two control bits select an
additional division factor. See
Reset:
Read:
Write:
and RTR0
Freescale Semiconductor, Inc.
RTR1
0 0
0 1
1 0
1 1
For More Information On This Product,
Figure 8-18. Pulse Accumulator Control Register (PACTL)
DDRA7
$0026
8.7 Pulse
8.7 Pulse
8.7 Pulse
8.7 Pulse
Section 5. Input/Output (I/O)
8.3 Input
Bit 7
0
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PAEN
E = 1 MHz
10.923 ms
21.845 ms
Programmable Timer
2.731 ms
5.461 ms
Capture.
Table 8-6. Real-Time Interrupt Rates
6
0
Accumulator.
Accumulator.
Accumulator.
Accumulator.
PAMOD
5
0
Table
E = 2 MHz
16.384 ms
32.768 ms
4.096 ms
8.192 ms
PEDGE
4
8-6.
0
Ports.
DDRA3
13
3
0
rate clock that is compensated
E = 3 MHz
16.384 ms
32.768 ms
65.536 ms
8.192 ms
I4/O5
2
0
MC68HC711D3 — Rev. 2
RTR1
1
0
E = X MHz
(E/2
(E/2
(E/2
(E/2
MOTOROLA
13
14
15
16
RTR0
)
)
)
)
Bit 0
0