mc68hc11d0cfn2 Freescale Semiconductor, Inc, mc68hc11d0cfn2 Datasheet - Page 109

• Manufacturer Part Number: mc68hc11d0cfn2
• Description: M68hc11 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

8.4.10 Timer Interrupt Flag 2 Register
MC68HC711D3 — Rev. 2
MOTOROLA
NOTE:
PAII — Pulse Accumulator Input Edge Interrupt Enable Bit
Bits in TMSK2 correspond bit for bit with flag bits in TFLG2. Ones in TMSK2 enable
the corresponding interrupt sources.
PR1 and PR0 — Timer Prescaler Select Bits
The timer interrupt flag 2 register (TFLG2) bits indicate when certain timer system
events have occurred. Coupled with the four high-order bits of TMSK2, the bits of
TFLG2 allow the timer subsystem to operate in either a polled or interrupt driven
system. Each bit of TFLG2 corresponds to a bit in TMSK2 in the same position.
Clear flags by writing a 1 to the corresponding bit position(s).
TOF — Timer Overflow Interrupt Flag
RTIF — Real-Time (Periodic) Interrupt Flag
PAOVF — Pulse Accumulator Overflow Interrupt Flag
PAIF — Pulse Accumulator Input Edge Interrupt Flag
Bits 3–0 — Not implemented
Address:
Refer to
These bits are used to select the prescaler divide-by ratio. In normal modes,
PR1 and PR0 can be written once only, and the write must be within 64 cycles
after reset. Refer to
Set when TCNT changes from $FFFF to $0000
Refer to
Refer to
Refer to
Always read 0.
Reset:
Read:
Write:
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8.7 Pulse
8.5 Real-Time
8.7 Pulse
8.7 Pulse
Bit 7
TOF
0
Figure 8-15. Timer Interrupt Flag 2 Register (TFLG2)
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RTIF
Programmable Timer
6
0
Accumulator.
Accumulator.
Accumulator.
Table 8-4
PR1 and PR0
Interrupt.
Table 8-4. Timer Prescale
PAOVF
0 0
0 1
1 0
1 1
5
0
for specific timing values.
PAIF
4
0
Prescaler
3
0
0
16
1
4
8
2
0
0
Output Compare (OC)
Programmable Timer
1
0
0
Data Sheet
Bit 0
0
0
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