mc68hc11d0cfn2 Freescale Semiconductor, Inc, mc68hc11d0cfn2 Datasheet - Page 80

• Manufacturer Part Number: mc68hc11d0cfn2
• Description: M68hc11 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Serial Communications Interface (SCI)
6.7.4 SCI Status Register
Data Sheet
80
The SCI status register (SCSR) provides inputs to the interrupt logic circuits for
generation of the SCI system interrupt.
TDRE — Transmit Data Register Empty Flag
TC — Transmit Complete Flag
RDRF — Receive Data Register Full Flag
IDLE — Idle Line Detected Flag
OR — Overrun Error Flag
This flag is set when SCDR is empty. Clear the TDRE flag by reading SCSR with
TDRE set and then writing to SCDR.
This flag is set when the transmitter is idle (no data, preamble, or break
transmission in progress). Clear the TC flag by reading SCSR with TC set and
then writing to SCDR.
This flag is set if a received character is ready to be read from SCDR. Clear the
RDRF flag by reading SCSR with RDRF set and then reading SCDR.
This flag is set if the RxD line is idle. Once cleared, IDLE is not set again until
the RxD line has been active and becomes idle again. The IDLE flag is inhibited
when RWU = 1. Clear IDLE by reading SCSR with IDLE set and then reading
SCDR.
OR is set if a new character is received before a previously received character
is read from SCDR. Clear the OR flag by reading SCSR with OR set and then
reading SCDR.
Address:
Reset:
Read:
Write:
0 = SCDR busy
1 = SCDR empty
0 = Transmitter busy
1 = Transmitter idle
0 = SCDR empty
1 = SCDR full
0 = RxD line active
1 = RxD line idle
0 = No overrun
1 = Overrun detected
Freescale Semiconductor, Inc.
For More Information On This Product,
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TDRE
Bit 7
Serial Communications Interface (SCI)
1
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Figure 6-6. SCI Status Register (SCSR)
TC
6
1
RDRF
5
0
IDLE
4
0
OR
3
0
NF
2
0
MC68HC711D3 — Rev. 2
FE
1
0
MOTOROLA
Bit 0
0
0