mc68hc11d0cfn2 Freescale Semiconductor, Inc, mc68hc11d0cfn2 Datasheet - Page 90

• Manufacturer Part Number: mc68hc11d0cfn2
• Description: M68hc11 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Serial Peripheral Interface (SPI)
7.5 SPI Signals
7.5.1 Master In/Slave Out (MISO)
7.5.2 Master Out/Slave In (MOSI)
7.5.3 Serial Clock (SCK)
7.5.4 Slave Select (SS)
Data Sheet
90
This subsection contains description of the four SPI signals:
MISO is one of two unidirectional serial data signals. It is an input to a master
device and an output from a slave device. The MISO line of a slave device is placed
in the high-impedance state if the slave device is not selected.
The MOSI line is the second of the two unidirectional serial data signals. It is an
output from a master device and an input to a slave device. The master device
places data on the MOSI line a half-cycle before the clock edge that the slave
device uses to latch the data.
SCK, an input to a slave device, is generated by the master device and
synchronizes data movement in and out of the device through the MOSI and MISO
lines. Master and slave devices are capable of exchanging a byte of information
during a sequence of eight clock cycles.
Four possible timing relationships can be chosen by using control bits CPOL and
CPHA in the serial peripheral control register (SPCR). Both master and slave
devices must operate with the same timing. The SPI clock rate select bits, SPR1
and SPR0, in the SPCR of the master device, select the clock rate. In a slave
device, SPR1 and SPR0 have no effect on the operation of the SPI.
The SS input of a slave device must be externally asserted before a master device
can exchange data with the slave device. SS must be low before data transactions
and must stay low for the duration of the transaction.
The SS line of the master must be held high. If it goes low, a mode fault error flag
(MODF) is set in the serial peripheral status register (SPSR). To disable the mode
fault circuit, write a 1 in bit 5 of the port D data direction register. This sets the SS
pin to act as a general-purpose output. The other three lines are dedicated to the
SPI whenever the serial peripheral interface is on.
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Freescale Semiconductor, Inc.
Master in/slave out (MISO)
Master out/slave in (MOSI)
Serial clock (SCK)
Slave select (SS)
For More Information On This Product,
Serial Peripheral Interface (SPI)
Go to: www.freescale.com
MC68HC711D3 — Rev. 2
MOTOROLA