mc68hc11d0cfn2 Freescale Semiconductor, Inc, mc68hc11d0cfn2 Datasheet - Page 105

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mc68hc11d0cfn2

Manufacturer Part Number
mc68hc11d0cfn2
Description
M68hc11 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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8.4.3 Output Compare 1 Mask Register
8.4.4 Output Compare 1 Data Register
MC68HC711D3 — Rev. 2
MOTOROLA
Use OC1M with OC1 to specify the bits of port A that are affected by a successful
OC1 compare. The bits of the OC1M register correspond to PA7–PA3.
OC1M7–OC1M3 — Output Compare Masks
Bits 2–0 — Not implemented; always read 0.
Use this register with OC1 to specify the data that is to be stored on the affected
pin of port A after a successful OC1 compare. When a successful OC1 compare
occurs, a data bit in OC1D is stored in the corresponding bit of port A for each bit
that is set in OC1M.
If OC1Mx is set, data in OC1Dx is output to port A bit x on successful OC1
compares.
Bits 2–0 — Not implemented; always read 0.
Address:
Address:
Set bit(s) to enable OC1 to control corresponding pin(s) of port A.
Reset:
Reset:
Read:
Write:
Read:
Write:
0 = OC1 disabled
1 = OC1 enabled to control the corresponding pin of port A
Freescale Semiconductor, Inc.
For More Information On This Product,
OC1M7
OC1D7
$000C
$000D
Bit 7
Bit 7
Figure 8-8. Output Compare 1 Mask Register (OC1M)
0
0
Figure 8-9. Output Compare 1 Data Register (OC1D)
Go to: www.freescale.com
OC1M6
OC1D6
Programmable Timer
6
0
6
0
OC1M5
OC1D5
5
0
5
0
OC1M4
OC1D4
4
4
0
0
OC1M3
OC1D3
3
0
3
0
2
0
0
2
0
0
Output Compare (OC)
Programmable Timer
1
0
0
1
0
0
Data Sheet
Bit 0
Bit 0
0
0
0
0
105

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