sed1355 ETC-unknow, sed1355 Datasheet - Page 108

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Page 102
8.2.3 Panel/Monitor Configuration Registers
bit 7
bits 5-4
bit 3
bit 2
bit 1
bit 0
bits 5-0
SED1355
X23A-A-001-11
Panel Type Register
REG[02h]
EL Panel
Enable
MOD Rate Register
REG[03h]
n/a
Panel Data Width Bits [1:0]
n/a
n/a
EL Panel Mode Enable
When this bit = 1, EL Panel support mode is enabled. Every 262143 frames (approximately 1 hour
at 60Hz frame rate) the identical panel data is sent to two consecutive frames, i.e. the frame rate
modulation circuitry is frozen for one frame.
Panel Data Width Bits [1:0]
These bits select the LCD interface data width as shown in the following table.
Panel Data Format Select
When this bit = 1, color passive LCD panel data format 2 is selected.
When this bit = 0, passive LCD panel data format 1 is selected.
Color/Mono Panel Select
When this bit = 1, color passive LCD panel is selected.
When this bit = 0, monochrome passive LCD panel is selected.
Dual/Single Panel Select
When this bit = 1, dual passive LCD panel is selected.
When this bit = 0, single passive LCD panel is selected.
TFT/Passive LCD Panel Select
When this bit = 1, TFT/D-TFD panel is selected.
When this bit = 0, passive LCD panel is selected.
MOD Rate Bits [5:0]
When the DRDY pin is configured as MOD, this register controls the toggle rate of the MOD out-
put. When this register is zero, the MOD output signal toggles every FPFRAME. When this register
is non-zero, its value represents the number of FPLINE pulses between toggles of the MOD output
signal.
00
01
10
11
Panel Data
Width Bit 1
MOD Rate
Bit 5
Table 8-3: Panel Data Width Selection
Panel Data
Width Bit 0
MOD Rate
Bit 4
Passive LCD Panel Data
Width Size
Reserved
16-bit
4-bit
8-bit
Panel Data
Format Select
MOD Rate
Bit 3
Color/Mono.
Panel Select
MOD Rate
Bit 2
TFT/D-TFD Panel Data Width
Reserved
Epson Research and Development
12-bit
16-bit
Size
9-bit
Dual/Single
Panel Select
MOD Rate
Bit 1
Hardware Functional Specification
Vancouver Design Center
Issue Date: 99/05/18
TFT/ Passive
LCD Panel
Select
MOD Rate
Bit 0
RW
RW