sed1355 ETC-unknow, sed1355 Datasheet - Page 146

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Page 140
14 Clocking
14.1 Maximum MCLK: PCLK Ratios
SED1355
X23A-A-001-11
Ink
off
on
• Dual Monochrome Panel with Half Frame Buffer
• Simultaneous CRT + Dual Monochrome Panel with
• Single Panel.
• CRT.
• Dual Monochrome/Color Panel with Half Frame Buffer
• Simultaneous CRT + Single Panel.
• Simultaneous CRT + Dual Monochrome/Color Panel
• Dual Color Panel with Half Frame Buffer Enabled.
• Simultaneous CRT + Dual Color Panel with Half
• Single Panel.
• CRT.
• Dual Monochrome/Color Panel with Half Frame Buffer
• Simultaneous CRT + Single Panel.
• Simultaneous CRT + Dual Monochrome/Color Panel
• Dual Monochrome Panel with Half Frame Buffer
• Simultaneous CRT + Dual Monochrome Panel with
• Dual Color Panel with Half Frame Buffer Enabled.
• Simultaneous CRT + Dual Color Panel with Half
Disabled.
with Half Frame Buffer Disabled.
Enabled.
Half Frame Buffer Enable.
Frame Buffer Enable.
Disabled.
with Half Frame Buffer Disabled.
Enabled.
Half Frame Buffer Enable.
Frame Buffer Enable.
Display type
Table 14-1: Maximum PCLK Frequency with EDO-DRAM
5, 4, 3
N
5
4
3
5
4
3
5
4
3
5
4
3
5
4
3
RC
MCLK/2
MCLK/2
MCLK/2
MCLK/2
MCLK/2
MCLK/2
MCLK/2
MCLK/2
MCLK/2
MCLK/3
MCLK/2
MCLK/2
MCLK
MCLK
MCLK
1 bpp
MCLK/2
MCLK/2
MCLK/2
MCLK/2
MCLK/2
MCLK/2
MCLK/3
MCLK/2
MCLK/2
MCLK/3
MCLK/2
MCLK/2
MCLK
MCLK
MCLK
2 bpp
Maximum PCLK Allowed
Epson Research and Development
Hardware Functional Specification
MCLK/2
MCLK/2
MCLK/2
MCLK/2
MCLK/2
MCLK/2
MCLK/2
MCLK/2
MCLK/3
MCLK/2
MCLK/2
MCLK/3
MCLK/3
MCLK/2
MCLK
MCLK
4 bpp
Vancouver Design Center
MCLK/2
MCLK/2
MCLK/2
MCLK/3
MCLK/2
MCLK/2
MCLK/2
MCLK/2
MCLK/2
MCLK/3
MCLK/3
MCLK/2
MCLK/3
MCLK/3
MCLK/2
8 bpp
Issue Date: 99/05/18
MCLK/3
MCLK/3
MCLK/2
MCLK/3
MCLK/3
MCLK/3
MCLK/3
MCLK/2
MCLK/2
MCLK/3
MCLK/3
MCLK/3
MCLK/4
MCLK/3
MCLK/3
16 bpp