sed1355 ETC-unknow, sed1355 Datasheet - Page 85
sed1355
Manufacturer Part Number
sed1355
Description
Sed1355 Embedded Ramdac Lcd/crt Controller
Manufacturer
ETC-unknow
Datasheet
1.SED1355.pdf
(509 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
sed1355F0A
Manufacturer:
EPSON/爱普生
Quantity:
20 000
Company:
Part Number:
sed1355FOA
Manufacturer:
EPSON
Quantity:
996
Part Number:
sed1355FOA
Manufacturer:
EPSON/爱普生
Quantity:
20 000
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Epson Research and Development
Vancouver Design Center
7.5.2 8-Bit Single Monochrome Passive LCD Panel Timing
VDP
VNDP
HDP
HNDP
Hardware Functional Specification
Issue Date: 99/05/18
UD[3:0], LD[3:0]
= Vertical Display Period
= Vertical Non-Display Period
= Horizontal Display Period
= Horizontal Non-Display Period
* Diagram drawn with 2 FPLINE vertical blank period
Example timing for a 640x480 panel
FPFRAME
FPSHIFT
FPLINE
FPLINE
MOD
MOD
UD3
UD2
UD1
UD0
LD3
LD2
LD1
LD0
Figure 7-26: 8-Bit Single Monochrome Passive LCD Panel Timing
1-1
1-2
1-3
1-4
1-5
1-6
1-7
1-8
LINE1
1-13
1-10
1-11
1-12
1-14
1-15
1-16
1-9
= (REG[09h] bits [1:0], REG[08h] bits [7:0]) + 1
= (REG[0Ah] bits [5:0]) + 1
= ((REG[04h] bits [6:0]) + 1)*8Ts
= ((REG[05h] bits [4:0]) + 1)*8Ts
LINE2
LINE3
LINE4
VDP
HDP
LINE479 LINE480
VNDP
1-633
1-634
1-635
1-636
1-637
1-638
1-639
1-640
HNDP
LINE1
LINE2
X23A-A-001-11
SED1355
Page 79
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