sed1355 ETC-unknow, sed1355 Datasheet - Page 445
sed1355
Manufacturer Part Number
sed1355
Description
Sed1355 Embedded Ramdac Lcd/crt Controller
Manufacturer
ETC-unknow
Datasheet
1.SED1355.pdf
(509 pages)
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Epson Research and Development
Vancouver Design Center
3 SED1355 Host Bus Interface
3.1 PowerPC Host Bus Interface Pin Mapping
Interfacing to the Motorola MPC821 Microprocessor
Issue Date: 99/05/05
Note
The SED1355 implements a 16-bit native PowerPC host bus interface which is used to
interface to the MPC821 microprocessor.
The PowerPC host bus interface is selected by the SED1355 on the rising edge of RESET#.
After releasing reset the bus interface signals assume their selected configuration. For
details on SED1355 configuration, see Section 4.3, “SED1355 Hardware Configuration”
on page 18.
The following table shows the functions of each host bus interface signal.
At reset, the Host Interface Disable bit in the Miscellaneous Disable Register
(REG[1Bh] bit 7) is set to 1. This means that only REG[1Ah] (read-only) and
REG[1Bh] are accessible until a write to REG[1Bh] sets bit 7 to 0 making all regis-
ters accessible. When debugging a new hardware design, this can sometimes give the
appearance that the interface is not working, so it is important to remember to clear this
bit before proceeding with debugging.
Table 3-1: PowerPC Host Bus Interface Pin Mapping
Pin Names
SED1355
BUSCLK
RD/WR#
AB[20:0]
DB[15:0]
RESET#
WAIT#
WE1#
WE0#
M/R#
RD#
CS#
BS#
External Decode
External Decode
PowerPC
CLKOUT
RESET#
A[11:31]
RD/WR
D[0:15]
TSIZ0
TSIZ1
TA
TS
BI
X23A-G-008-03
SED1355
Page 13
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