sed1355 ETC-unknow, sed1355 Datasheet - Page 257

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Epson Research and Development
Vancouver Design Center
Appendix A Supported Panel Values
A.1 Supported Panel Values
Programming Notes and Examples
Issue Date: 99/04/27
REG[0Ah] 0011 1110
REG[0Dh] 0000 1101
REG[1Bh] 0000 0001
REG[02h] 0000 0000
REG[03h] 0000 0000
REG[04h] 0010 0111
REG[05h] 0001 0111
REG[08h] 1110 1111
REG[09h] 0000 0000
REG[19h] 0000 0011
REG[24h] 0000 0000
REG[26h]
Register
REG[0Ah] 0000 0010
REG[0Dh] 0000 1101
REG[1Bh] 0000 0001
REG[02h] 0001 0000
REG[03h] 0000 0000
REG[04h] 0100 1111
REG[05h] 0000 0011
REG[08h] 1101 1111
REG[09h] 0000 0001
REG[19h] 0000 0001
REG[24h] 0000 0000
REG[26h]
Register
320X240@60Hz
Mono 4-Bit
load LUT
Note
The following tables show related register data for different panels. All the examples are based on
640X480@60Hz
Table 12-1: Passive Single Panel @ 320x240 with 40MHz Pixel Clock
Table 12-2: Passive Single Panel @ 640x480 with 40MHz Pixel Clock
8 bpp and 2M bytes of 50 ns EDO-DRAM.
Mono 8-Bit
load LUT
The following settings may not reflect the ideal settings for your system configuration. Power,
speed, and cost requirements may dictate different starting parameters for your system
(e.g. 320x240@78Hz using 12MHz clock).
320X240@60Hz
1000 0000
0000 0000
0010 0111
0001 0111
1110 1111
0000 0000
0011 1110
0000 1101
0000 0011
0000 0001
0000 0000
Mono 4-Bit
load LUT
EL
640X480@60Hz
0001 0100
0000 0000
0100 1111
0000 0011
1101 1111
0000 0001
0000 0010
0000 1101
0000 0001
0000 0001
0000 0000
Color 8-Bit
load LUT
320X240@60Hz
0001 0100
0000 0000
0010 0111
0001 0111
1110 1111
0000 0000
0011 1110
0000 1101
0000 0011
0000 0001
0000 0000
Color 8-Bit
load LUT
Color 16-Bit
640X480@60Hz
0010 0100
0000 0000
0100 1111
0000 0011
1101 1111
0000 0001
0000 0010
0000 1101
0000 0001
0000 0001
0000 0000
load LUT
320X240@60Hz
0001 1100
0000 0000
0010 0111
0001 0111
1110 1111
0000 0000
0011 1110
0000 1101
0000 0011
0000 0001
0000 0000
Color 8-Bit
load LUT
Format 2
set vertical display height bits 7-0
set vertical display height bits 9-8
set horizontal non-display period
set Look-Up Table address to 0
set vertical non-display period
set MCLK and PCLK divide
set horizontal display width
set 8 bpp and LCD enable
disable half frame buffer
load Look-Up Table
set vertical display height bits 7-0
set vertical display height bits 9-8
set horizontal non-display period
set Look-Up Table address to 0
set vertical non-display period
set panel type
set MCLK and PCLK divide
set MOD rate
set horizontal display width
set 8 bpp and LCD enable
disable half frame buffer
Notes
load Look-Up Table
set panel type
set MOD rate
Notes
X23A-G-003-05
SED1355
Page 101