sed1355 ETC-unknow, sed1355 Datasheet - Page 87

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sed1355

Manufacturer Part Number
sed1355
Description
Sed1355 Embedded Ramdac Lcd/crt Controller
Manufacturer
ETC-unknow
Datasheet

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Epson Research and Development
Vancouver Design Center
7.5.3 4-Bit Single Color Passive LCD Panel Timing
VDP
VNDP
HDP
HNDP
Hardware Functional Specification
Issue Date: 99/05/18
= Vertical Display Period
= Vertical Non-Display Period
= Horizontal Display Period
= Horizontal Non-Display Period
FPFRAME
* Diagram drawn with 2 FPLINE vertical blank period
Example timing for a 640x480 panel
FPSHIFT
FPLINE
UD[3:0]
FPLINE
MOD
MOD
UD3
UD2
UD1
UD0
1-B1
1-R1
1-G1
1-R2
Figure 7-28: 4-Bit Single Color Passive LCD Panel Timing
1-G2
1-B2
1-R3
1-G3
LINE1
1-B3
1-G4
1-R4
1-B4
LINE2
= (REG[09h] bits [1:0], REG[08h] bits [7:0]) + 1
= (REG[0Ah] bits [5:0]) + 1
= ((REG[04h] bits [6:0]) + 1)*8Ts
= ((REG[05h] bits [4:0]) + 1)*8Ts
LINE3
VDP
LINE4
HDP
LINE479 LINE480
1-B319
1-R320
1-G320
1-B320
VNDP
HNDP
LINE1
LINE2
X23A-A-001-11
SED1355
Page 81

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