sed1355 ETC-unknow, sed1355 Datasheet - Page 194

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Page 38
8.4 Limitations
SED1355
X23A-G-003-05
REG[10h] Screen 1 Display Start Address Register 0
REG[11h] Screen 1 Display Start Address Register 1
REG[12h] Screen 1 Display Start Address Register 2
REG[16h] Memory Address Offset Register 0
REG[17h] Memory Address Offset Register 1
Bit 15
Bit 7
Bit 7
n/a
n/a
Bit 14
Bit 6
Bit 6
n/a
n/a
Note
Step two involves setting the screen 1 start address registers. Set to 1024 - width for 16 bpp modes
and to (1024 - width) / 2 for 8 bpp modes.
Finally set the memory address offset registers to 1024 pixels. In 16 bpp mode load registers
[17h:16h] with 1024 and in 8 bpp mode load the registers with 512.
The following limitations apply to Hardware Portrait Mode:
• Only 8 bpp and 16 bpp modes are supported - 1/2/4 bpp modes are not supported.
• Cursor and ink images are not rotated - software rotation must be used. Hardware Portrait Mode
• Split screen images appear side-by-side, i.e. the portrait display is split vertically.
• Pixel panning works vertically.
must be turned off when the programmer is accessing the Cursor or the ink layer.
Drawing into the hardware cursor/ink layer with rotation enabled does not work without some
form of address manipulation. The easiest way to ensure correct cursor/ink images is to disable
Hardware Portrait Mode, draw in the cursor/ink memory, then re-enable hardware portrait mode.
While writing the cursor/ink memory each pixel must be transformed to its rotated position.
Bit 13
Bit 5
Bit 5
n/a
n/a
Bit 12
Bit 4
Bit 4
n/a
n/a
Bit 11
Bit 19
Bit 3
Bit 3
n/a
Bit 10
Bit 18
Bit 10
Bit 2
Bit 2
Epson Research and Development
Programming Notes and Examples
Bit 17
Bit 1
Bit 9
Bit 1
Bit 9
Vancouver Design Center
Issue Date: 99/04/27
Bit 16
Bit 0
Bit 8
Bit 0
Bit 8