sed1355 ETC-unknow, sed1355 Datasheet - Page 181

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Epson Research and Development
Vancouver Design Center
5.2 Panning and Scrolling
Programming Notes and Examples
Issue Date: 99/04/27
3.
The terms panning and scrolling refer to the actions used to move the viewport about a virtual
display. Although the image is stored entirely in the display buffer, only a portion is actually visible
at any given time.
Panning describes the horizontal (side to side) motion of the viewport. When panning to the right the
image in the viewport appears to slide to the left. When panning to the left the image to appears to
slide to the right. Scrolling describes the vertical (up and down) motion of the viewport. Scrolling
down causes the image to appear to slide up and scrolling up causes the image to appear to slide
down.
Both panning and scrolling are performed by modifying the start address register. The start address
refers to the word offset in the display buffer where the image will start being displayed from. At
color depths less than 15 bpp a second register, the pixel pan register, is required for smooth pixel
level panning.
Internally, the SED1355 latches different signals at different times. Due to this internal sequence,
there is an order in which the start address and pixel pan registers should be accessed during scrolling
operations to provide the smoothest scrolling. Setting the registers in the wrong sequence or at the
wrong time will result in a “tearing” or jitter effect on the display.
The start address is latched at the beginning of each frame, therefore the start address can be set any
time during the display period. The pixel pan register values are latched at the beginning of each
display line and must be set during the vertical non-display period. The correct sequence for
programing these registers is:
1.
2.
3.
4.
Register [17h] will be written with 00h and register [16h] will be written with A0h.
Check that we have enough memory for the required virtual height.
Each line uses 160 words and we need 480 lines for a total of (160*480) 76,800 words. This
display could be done on a system with the minimum supported memory size of 512 K bytes.
It is safe to continue with these values.
Wait until just after a vertical non-display period (read register [0Ah] and watch bit 7 for the
non-display status).
Update the start address registers.
Wait until the next vertical non-display period.
Update the pixel paning register.
pixels_per_word = 16 / bpp = 16 / 4 = 4
offset = pixels_per_line / pixels_per_word = 640 / 4 = 160 words = 0A0h words
X23A-G-003-05
SED1355
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