sed1355 ETC-unknow, sed1355 Datasheet - Page 342

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Page 12
5 Host Bus Interface Pin Mapping
SED1355
X23A-G-004-04
Pin Names
SED1355
AB[16:13]
BUSCLK
DB[15:0]
RD/WR#
RESET#
AB[12:1]
WAIT#
WE1#
WE0#
AB20
M/R#
AB0
CS#
BS#
RD#
RD/WR#
RESET#
A[19:13]
D[15:0]
A[12:1]
WAIT#
WE1#
WE0#
CKIO
SH-3
RD#
A20
BS#
A0
RD/WR#
RESET#
A[19:13]
D[15:0]
A[12:1]
WE1#
WE0#
CKIO
SH-4
RDY
BS#
RD#
A20
A0
Table 5-1: CPU Interface Pin Mapping
DTACK#
RESET#
A[19:13]
MC68K
D[15:0]
A[12:1]
Bus 1
UDS#
LDS#
R/W#
CLK
AS#
V
V
A20
DD
DD
DSACK1#
RESET#
A[19:13]
D[31:16]
MC68K
A[12:1]
Bus 2
R/W#
SIZ1
SIZ0
DS#
CLK
AS#
A20
External Decode
External Decode
A0
SDU1355B0C Rev. 1.0 ISA Bus Evaluation Board User Manual
RESET#
Generic
A[19:13]
D[15:0]
A[12:1]
WAIT#
WE1#
WE0#
BCLK
RD1#
RD0#
A20
V
A0
DD
IOCHRDY
MIPS/ISA
LatchA20
SA[19:13]
SD[15:0]
MEMW#
SA[12:1]
MEMR#
inverted
RESET
SBHE#
SA0
CLK
V
V
DD
DD
Epson Research and Development
PowerPC
CLKOUT
RD/WR#
RESET#
A[12:18]
A[19:30]
D[0:15]
TSIZ0
TSIZ1
TS#
TA#
A11
A31
BI#
Vancouver Design Center
Issue Date: 98/10/30
PCMCIA
A[19:13]
inverted
D[15:0]
RESET
A[12:1]
-WAIT
-CE2
CLKI
-CE1
-WE
V
-OE
A20
A0
DD