sed1355 ETC-unknow, sed1355 Datasheet - Page 93

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sed1355

Manufacturer Part Number
sed1355
Description
Sed1355 Embedded Ramdac Lcd/crt Controller
Manufacturer
ETC-unknow
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
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sed1355F0A
Manufacturer:
EPSON/爱普生
Quantity:
20 000
Part Number:
sed1355FOA
Manufacturer:
EPSON
Quantity:
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Part Number:
sed1355FOA
Manufacturer:
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Epson Research and Development
Vancouver Design Center
7.5.6 16-Bit Single Color Passive LCD Panel Timing
VDP
VNDP
HDP
HNDP
Hardware Functional Specification
Issue Date: 99/05/18
= Vertical Display Period
= Vertical Non-Display Period
= Horizontal Display Period
= Horizontal Non-Display Period
UD[7:0], LD[7:0]
* Diagram drawn with 2 FPLINE vertical blank period
Example timing for a 640x480 panel
FPFRAME
FPSHIFT
FPLINE
FPLINE
MOD
MOD
UD7
UD6
UD5
UD4
UD3
UD2
UD1
UD0
LD7
LD6
LD5
LD4
LD3
LD2
LD1
LD0
Figure 7-34: 16-Bit Single Color Passive LCD Panel Timing
1-B2
1-B4
1-B1
1-R3
1-R2
1-G3
1-R4
1-G5
1-R6
1-R1
1-G2
1-G4
1-B5
1-G1
1-B3
1-R5
LINE1
1-G10
1-R10
1-G11
1-R11
1-G6
1-R7
1-B7
1-G7
1-G9
1-G8
1-R9
1-B6
1-R8
1-B8
1-B10
1-B9
= (REG[09h] bits [1:0], REG[08h] bits [7:0]) + 1
= (REG[0Ah] bits [5:0]) + 1
= ((REG[04h] bits [6:0]) + 1)*8Ts
= ((REG[05h] bits [4:0]) + 1)*8Ts
LINE2
1-B11
1-B13
1-B15
1-G12
1-G14
1-R15
1-G16
1-R13
1-R12
1-B12
1-G13
1-R14
1-B14
1-G15
1-R16
1-B16
LINE3
VDP
LINE4
HDP
LINE479 LINE480
VNDP
1-R639
1-G637
1-R640
1-G635
1-G636
1-R637
1-B637
1-G638
1-G640
1-B636
1-R638
1-B638
1-G639
1-B640
1-B639
1-R636
HNDP
LINE1
LINE2
X23A-A-001-11
SED1355
Page 87

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